adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 19

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

MXVR BOARD LAYOUT GUIDELINES
MLF pin
MXI driven with external clock oscillator IC (recommended)
• Capacitors:
• Resistor:
• The RC network connected to the MLF pin should be
• The RC network should be wired up and connected to the
• The capacitors in the RC network should be grounded to
• The RC network should be shielded using MXEGND
• Avoid routing other switching signals near the RC network
• MXI should be driven with the clock output of a
• MXO should be left unconnected.
• Avoid routing other switching signals near the oscillator
VDDINT (1.25V)
R1
0.1 F
49.152MHz OSCILLATOR
220
C1
C1: 0.1 μF (PPS type, 2% tolerance recommended)
C2: 0.01 μF (PPS type, 2% tolerance recommended)
R1: 220 Ω (1% tolerance)
located physically close to the MLF pin on the board.
MLF pin using wide traces.
MXEGND.
traces.
to avoid crosstalk.
49.152 MHz or 45.1584 MHz clock oscillator IC.
and clock output trace to avoid crosstalk. When not possi-
ble, shield traces with ground.
FB
0.01 F
CLKO
C2
0.01 F
0.1 F
MPIVDD
MXEGND
MXI
MXO
MLF
MXEGND
ADSP-BF539F
Figure 9. Example Connections of ADSP-BF539/ADSP-BF539F to MOST Network
RSCLK0
TSCLK0
MRXON
MMCLK
MTXON
MBCLK
DT0PRI
RFS0
MRX
MTX
MFS
Rev. A | Page 19 of 60 | February 2008
33
33
33
POWER GATING CIRCUIT
27
5 V
MXI/MXO with external crystal
MXEGND–MXVR crystal oscillator and MXVR PLL ground
MXEVDD–MXVR crystal oscillator 3.3 V power
• The crystal must be a 49.152 MHz or 45.1584 MHz funda-
• The crystal and load capacitors should be placed physically
• The load capacitors should be grounded to MXEGND.
• The crystal and load capacitors should be wired up using
• Board trace capacitance on each lead should not be more
• Trace capacitance plus load capacitance should equal the
• Avoid routing other switching signals near the crystal and
• Should be routed with wide traces or as ground plane.
• Should be tied together to other board grounds at only one
• Avoid routing other switching signals near to MXEGND to
• Should be routed with wide traces or as power plane.
• Locally bypass MXEVDD with 0.1 μF and 0.01 μF decou-
• Avoid routing other switching signals near to MXEVDD to
mental mode crystal.
close to the MXI and MXO pins on the board.
wide traces.
than 3 pF.
load capacitance specification for the crystal.
components to avoid crosstalk. When not possible, shield
traces and components with ground.
point on the board.
avoid crosstalk.
pling capacitors to MXEGND.
avoid crosstalk.
L/RCLK
MCLK
BCLK
SDATA
5V
ADSP-BF539/ADSP-BF539F
Rx_Vdd
Tx_Vdd
TX_Data
RX_Data
Status
AUDIO DAC
MOST FOT
MOST
NETWORK
AUDIO
CHANNELS