adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 36

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF539/ADSP-BF539F
External Port Bus Request and Grant Cycle Timing
Table 22
on Page 37
operations for synchronous and for asynchronous BR.
Table 22. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
BS
BH
SD
SE
DBG
EBG
DBH
EBH
and
describe external port bus request and grant cycle
ARE
BR
AMSx
BGH
CLKOUT
ADDR19-1
ABE1-0
AWE
BG
Table 23 on Page 37
BR Setup to Falling Edge of CLKOUT
Falling Edge of CLKOUT to BR Deasserted Hold Time
CLKOUT Low to AMSx, Address, and ARE/AWE Disable
CLKOUT Low to AMSx, Address, and ARE/AWE Enable
CLKOUT High to BG High Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH High Setup
CLKOUT High to BGH Deasserted Hold Time
and
Figure 17. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Figure 17
t
BS
and
Rev. A | Page 36 of 60 | February 2008
Figure 18
t
BH
t
t
t
SD
SD
SD
t
t
DBG
DBH
Min
4.0
0.0
t
t
EBG
EBH
Max
4.5
4.5
3.6
3.6
3.6
3.6
t
t
t
SE
SE
SE
Unit
ns
ns
ns
ns
ns
ns
ns
ns