saa7103h-v4 NXP Semiconductors, saa7103h-v4 Datasheet - Page 48
saa7103h-v4
Manufacturer Part Number
saa7103h-v4
Description
Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7103H-V4.pdf
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Philips Semiconductors
SAA7102_SAA7103_4
Product data sheet
Table 44:
Legend: * = default value after reset.
Table 45:
Legend: * = default value after reset.
Subaddress Bit
2Ch
2Bh
2Ah
Bit
7
6
5
4
3
2
1 and 0 -
Symbol
VBSEN
CVBSEN1 R/W
CVBSEN0 R/W
CEN
ENCOFF
CLK2EN
Copy generation 0, 1, 2 and CG enable registers, subaddresses 2Ah to 2Ch, bit
description
Output port control register, subaddress 2Dh, bit description
7
6 to 4 -
3 to 0 CG[19:16] R/W
7 to 0 CG[15:8]
7 to 0 CG[7:0]
Access Value Description
R/W
R/W
R/W
R/W
R/W
Symbol
CGEN
Rev. 04 — 18 January 2006
0
1*
0*
1
0
1*
0
1*
0*
1
0
1*
0
Access Value Description
R/W
R/W
pin GREEN_VBS_CVBS provides a
component GREEN signal (CVBSEN1 = 0) or CVBS signal
(CVBSEN1 = 1)
luminance (VBS) signal
pin GREEN_VBS_CVBS provides a
component GREEN (G) or luminance (VBS) signal
CVBS signal
pin BLUE_CB_CVBS provides a
component BLUE (B) or color difference BLUE (C
CVBS signal
pin RED_CR_C provides a
component RED (R) or color difference RED (C
chrominance signal (C) as modulated subcarrier for
S-video
encoder
active
bypass, DACs are provided with RGB signal after cursor
insertion block
pin TTXRQ_XCLKO2 provides
teletext request signal (TTXRQ)
buffered crystal clock divided by two (13.5 MHz)
must be programmed with logic 0 to ensure compatibility to
future enhancements
0*
1
0
-
copy generation data output
disabled
enabled
must be programmed with logic 0 to ensure
compatibility to future enhancements
LSBs of the respective bytes are encoded
immediately after run-in, the MSBs of the
respective bytes have to carry the CRCC bits,
in accordance with the definition of copy
generation management system encoding
format.
SAA7102; SAA7103
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Digital video encoder
R
) signal
B
) signal
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