ep2sgx60e Altera Corporation, ep2sgx60e Datasheet - Page 26

• Manufacturer Part Number: ep2sgx60e
• Description: 4. Serial Configuration Devices Epcs1, Epcs4, Epcs16, Epcs64, And Epcs128 Data Sheet
• Manufacturer: Altera Corporation

Serial Configuration Device Memory Access
Figure 4–9. Read Status Operation Timing Diagram
4–26
Configuration Handbook, Volume 2
0
0
0
0
1
1
1
1
DCLK
BP2
ASDI
DATA
Table 4–20. Block Protection Bits in EPCS128
Bit
nCS
Status Register
Content
0
0
1
1
0
0
1
1
BP1
Bit
0
1
0
1
0
1
0
1
BP0
Bit
0
High Impedance
1
None
Upper 64th (1 sector: 63)
Upper 32nd (2 sectors: 62 to 63)
Upper 16th (4 sectors: 60 to 63)
Upper 8th (8 sectors: 56 to 63)
Upper quarter (16 sectors: 48 to 63)
Upper half (32 sectors: 32 to 63)
All sectors (64 sectors: 0 to 63)
2
Operation Code
3
You can read the status register at any time, even while a write or erase
cycle is in progress. When one of these cycles is in progress, you can check
the write in progress bit (bit 0 of the status register) before sending a new
operation to the device. The device can also read the status register
continuously, as shown in
Write Status Operation
The write status operation code is b'0000 0001, with the MSB listed
first. Use the write status operation to set the status register block
protection bits. The write status operation has no effect on the other bits.
Therefore, you can implement this operation to protect certain memory
sectors, as defined in
block protect bits, the protected memory sectors are treated as read-only
4
5
Protected Area
6
7
MSB
7
8
6
9
Status Register Out
5
10
Table 4–16
4
11
Memory Content
Figure
3
12
2
13
All sectors (64 sectors: 0 to 63)
Lower 63/64ths (63 sectors: 0 to 62)
Lower 31/32nds (62 sectors: 0 to 61)
Lower 15/16ths (60 sectors: 0 to 59)
Lower seven-eighths (56 sectors: 0 to 55)
Lower three-quarters (48 sectors: 0 to 47)
Lower half (32 sectors: 0 to 31)
None
through
1
4–9.
14
0
15
MSB
7
Table
6
Unprotected Area
5
4–20. After setting the
Status Register Out
4
3
Altera Corporation
2
1
0
May 2008
7