xc2v1000-4fg256c Xilinx Corp., xc2v1000-4fg256c Datasheet - Page 30
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xc2v1000-4fg256c
Manufacturer Part Number
xc2v1000-4fg256c
Description
Virtex-ii Platform Fpgas
Manufacturer
Xilinx Corp.
Datasheet
1.XC2V1000-4FG256C.pdf
(318 pages)
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Table 15: Dual-Port Mode Configurations
DS031-2 (v3.5) November 5, 2007
Product Specification
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Port A
Port B
Figure 29: 18 Kbit Block SelectRAM Memory in
R
DIP
ADDR
WE
EN
SSR
DI
CLK
18 Kbit Block SelectRAM
512 x 36
512 x 36
16K x 1
16K x 1
1K x 18
1K x 18
Single-Port Mode
8K x 2
8K x 2
4K x 4
4K x 4
2K x 9
2K x 9
DOP
512 x 36
16K x 1
1K x 18
1K x 18
8K x 2
8K x 2
4K x 4
4K x 4
2K x 9
2K x 9
DO
DS031_10_071602
www.xilinx.com
512 x 36
16K x 1
1K x 18
4K x 4
8K x 2
2K x 9
4K x 4
2K x 9
Dual-Port Configuration
As a dual-port RAM, each port of block SelectRAM has
access to a common 18 Kbit memory resource. These are
fully synchronous ports with independent control signals for
each port. The data widths of the two ports can be config-
ured independently, providing built-in bus-width conversion.
Table 15
ports A and B.
If both ports are configured in either 2K x 9-bit, 1K x 18-bit,
or 512 x 36-bit configurations, the 18 Kbit block is accessi-
ble from port A or B. If both ports are configured in either
16K x 1-bit, 8K x 2-bit. or 4K x 4-bit configurations, the
16 K-bit block is accessible from Port A or Port B. All other
configurations result in one port having access to an 18 Kbit
memory block and the other port having access to a 16 K-bit
subset of the memory block equal to 16 Kbits.
Virtex-II Platform FPGAs: Functional Description
illustrates the different configurations available on
512 x 36
16K x 1
1K x 18
2K x 9
8K x 2
4K x 4
512 x 36
16K x 1
1K x 18
8K x 2
512 x 36
16K x 1
Module 2 of 4
22
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