xc2v1000-4fg256c Xilinx Corp., xc2v1000-4fg256c Datasheet - Page 85
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xc2v1000-4fg256c
Manufacturer Part Number
xc2v1000-4fg256c
Description
Virtex-ii Platform Fpgas
Manufacturer
Xilinx Corp.
Datasheet
1.XC2V1000-4FG256C.pdf
(318 pages)
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Company:
Part Number:
XC2V1000-4FG256C
Manufacturer:
XILINX
Quantity:
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Part Number:
XC2V1000-4FG256C
Manufacturer:
XILINX/赛灵思
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Output Clock Jitter
Table 40: Output Clock Jitter
Output Clock Phase Alignment
Table 41: Output Clock Phase Alignment
DS031-3 (v3.5) November 5, 2007
Product Specification
Notes:
1. Values for this parameter are available at www.xilinx.com.
Notes:
1. "DLL outputs" is used here to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
2. CLKOUT_DUTY_CYCLE_DLL applies to the 1X clock outputs (CLK0, CLK90, CLK180, and CLK270) only if
3. Specification also applies to PSCLK.
Clock Synthesis Period Jitter
CLK0
CLK90
CLK180
CLK270
CLK2X, CLK2X180
CLKDV (integer division)
CLKDV (non-integer division)
CLKFX, CLKFX180
Phase Offset Between CLKIN and CLKFB
CLKIN/CLKFB
Phase Offset Between Any DCM Outputs
All CLK outputs
Duty Cycle Precision
DLL outputs
CLKFX outputs
DUTY_CYCLE_CORRECTION = TRUE.
Description
Description
(1)
R
CLKIN_CLKFB_PHASE
CLKOUT_PHASE
CLKOUT_DUTY_CYCLE_DLL
CLKOUT_DUTY_CYCLE_FX
CLKOUT_PER_JITT_0
CLKOUT_PER_JITT_90
CLKOUT_PER_JITT_180
CLKOUT_PER_JITT_270
CLKOUT_PER_JITT_2X
CLKOUT_PER_JITT_DV1
CLKOUT_PER_JITT_DV2
CLKOUT_PER_JITT_FX
Symbol
Symbol
www.xilinx.com
(2)
Virtex-II Platform FPGAs: DC and Switching Characteristics
Constraints
Constraints
±140
±150
±100
Note 1
±50
±100
±150
±150
±150
±200
±150
±300
-6
-6
Speed Grade
Speed Grade
Note 1
±140
±150
±100
±100
±150
±150
±150
±200
±150
±300
±50
-5
-5
Note 1
±140
±150
±100
±100
±150
±150
±150
±200
±150
±300
±50
-4
-4
Module 3 of 4
Units
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
37
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