mc68hc05bs8 Freescale Semiconductor, Inc, mc68hc05bs8 Datasheet - Page 11

• Manufacturer Part Number: mc68hc05bs8
• Description: Mc68hc05 Family Of Low-cost Single-chip Microcontrollers.
• Manufacturer: Freescale Semiconductor, Inc

Paragraph
Number
MC68HC05BS8
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.4
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.5
9.1
9.2
9.2.1
9.2.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
9.10.1
M-Bus Interface Features ......................................................................................8-1
M-Bus Protocol ......................................................................................................8-2
M-Bus Registers ....................................................................................................8-6
Programming Considerations ................................................................................8-11
Software Supported M-Bus Interface.....................................................................8-14
Introduction ............................................................................................................9-1
Polarity Correction .................................................................................................9-2
Sync Detection ......................................................................................................9-3
Free-running Pseudo Sync Signal Generator........................................................9-3
Sync Separation ....................................................................................................9-4
Vertical Sync Pulse Reshaper ...............................................................................9-5
Sync Signal Counters ............................................................................................9-5
VSYNC Interrupt....................................................................................................9-6
Sampling Pulse Output ..........................................................................................9-7
SSP Registers .......................................................................................................9-7
START Signal...................................................................................................8-3
Slave Address Transmission ............................................................................8-3
Data Transfer....................................................................................................8-4
Repeated START Signal ..................................................................................8-4
STOP Signal ....................................................................................................8-4
Arbitration Procedure .......................................................................................8-4
Clock Synchronization .....................................................................................8-5
Handshaking ....................................................................................................8-5
M-Bus Address Register (MADR) ....................................................................8-6
M-Bus Frequency Register (MFDR).................................................................8-6
M-Bus Control Register (MCR) ........................................................................8-7
M-Bus Status Register (MSR)..........................................................................8-8
M-Bus Data I/O Register (MDR) ......................................................................8-9
Initialization ......................................................................................................8-11
Generation of a START Signal and the First Byte of Data Transfer..................8-11
Software Responses after Transmission or Reception of a Byte .....................8-11
Generation of the STOP Signal........................................................................8-12
Generation of a Repeated START Signal ........................................................8-13
Slave Mode ......................................................................................................8-13
Arbitration Lost.................................................................................................8-13
Separate Vertical Sync Input............................................................................9-2
Separate Horizontal or Composite Sync Input.................................................9-2
Sync Signal Control and Status Register (SSCSR) .........................................9-7
SYNC SIGNAL PROCESSOR
M-BUS SERIAL INTERFACE
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