mc68hc05bs8 Freescale Semiconductor, Inc, mc68hc05bs8 Datasheet - Page 42

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mc68hc05bs8

Manufacturer Part Number
mc68hc05bs8
Description
Mc68hc05 Family Of Low-cost Single-chip Microcontrollers.
Manufacturer
Freescale Semiconductor, Inc
Datasheet
5
This bit must be cleared by software in the interrupt routine.
MCF - Data Transfer Complete
MAAS - Addressed as Slave
Then CPU needs to check the SRW bit and set its MTX bit accordingly. Writing to the M-Bus
Control register clears this bit.
MAL - Arbitration Lost
SIF - Software M-Bus Interrupt
Refer to Section 8 for detailed description of M-Bus Interface.
5.2.2.4
There are three interrupt sources from the 16-bit free-running counter timer.
5-8
Timer Status Register
2) A match of the calling address with its own specific address in slave mode -
3) A loss of bus arbitration - MAL set.
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
MAAS set.
Timer Interrupts
A byte transfer has been completed.
A byte is being transfer.
Currently addressed as a slave.
Not currently addressed.
Lost arbitration in master mode.
No arbitration lost.
Signals on PC6 and PC7 pins satisfy the “start” condition for the “soft”
M-Bus protocol. This bit cannot be set if the SIIC bit in the MCR is
cleared. An interrupt to the CPU is generated only if the I-bit in the
CCR is also cleared.
No “soft” M-Bus interrupt.
Address bit 7
$0013
RESETS AND INTERRUPTS
ICF
bit 6
OCF
bit 5
TOF
bit 4
bit 3
bit 2
bit 1
MC68HC05BS8
bit 0
uuu0 0000
on reset
State
TPG

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