mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 108

• Manufacturer Part Number: mpc8569e
• Description: Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

At recommended operating conditions with OV
Enhanced Secure Digital Host Controller (eSDHC)
2.16.2
The following table provides the eSDHC AC timing specifications as defined in
108
At recommended operating conditions with OV
Output high voltage
Output low voltage
Input/output leakage current
Note:
1. The min V
2. Open drain mode for MMC cards only.
SD_CLK clock frequency:
SD_CLK clock low time—High speed/Full speed mode
SD_CLK clock high time—High speed/Full speed mode
SD_CLK clock rise and fall times
Input setup times: SD_CMD, SD_DATx, SD_CD to SD_CLK
Input hold times: SD_CMD, SD_DATx, SD_CD to SD_CLK
Output delay time: SD_CLK to SD_CMD, SD_DATx valid
Notes:
1. The symbols used for timing specifications follow the pattern t
2. In full speed mode, clock frequency value can be 0–25 MHz for a SD/SDIO card and 0–20 MHz for a MMC card. In high speed
3. To satisfy setup timing, one way board routing delay between Host and Card, on SD_CLK, SD_CMD and SD_DATx should
4. Ccard ≤ 10 pF, (1 card) and C
5. System/board must be designed to ensure the input requirement to the device is achieved. Proper device operation is
6. The parameter values apply to both full speed and high speed modes.
and t
speed mode device timing (SHS) clock reference (K) going to the high (H) state, with respect to the output (O) reaching the
invalid state (X) or output hold time. Note that in general, the clock reference symbol representation is based on five letters
representing the clock of a particular functional. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
mode, clock frequency value can be 0–50 MHz for a SD/SDIO card and 0–52 MHz for a MMC card.
not exceed 0.65ns.
guaranteed for inputs meeting this requirement by design, simulation, characterization, or functional testing.
(first three letters of functional block)(reference)(state)(signal)(state)
Characteristic
IL
eSDHC AC Timing Specifications
and max V
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Table 67. eSDHC Interface DC Electrical Characteristics (continued)
SD/SDIO full speed/high speed mode
IH
Parameter
values are based on the respective min and max OV
MMC full speed/high speed mode
L
= C
BUS
Table 68. eSDHC AC Timing Specifications
Symbol
I
+ C
DD
IN
V
DD
V
OH
/I
OL
= 3.3 V
HOST
OZ
= 3.3 V
+ C
CARD
I
OH
Condition
I
OL
= –100 μA
≤ 40 pF.
= 2 mA
—
for outputs. For example, t
(first three letters of functional block)(signal)(state)(reference)(state)
t
Symbol
t
t
t
t
SHSKHOV
t
t
SHSCKR/
SHSIVKH
SHSIXKH
f
SHSCKH
SHSCKL
SHSCKF
SHSCK
1
OV
DD
Min
–10
IN
—
Figure 61
– 0.2
values found in
7/10
7/10
Min
3.7
2.5
–3
—
0
FHSKHOV
and
Figure
Max
25/50
20/52
0.3
Max
—
10
—
—
—
—
3
3
symbolizes eSDHC high
Table
Freescale Semiconductor
62.
3.
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
μA
V
V
for inputs
3, 4, 6
Notes
Notes
2, 4
4, 5
4, 6
4, 6
—
4
4
2
2