mpc8260aec Freescale Semiconductor, Inc, mpc8260aec Datasheet - Page 2

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mpc8260aec

Manufacturer Part Number
mpc8260aec
Description
Mpc826xa Hip4 Family Hardware
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Figure 1 shows the block diagram for the MPC826, the HiP4 superset device. Shaded portions indicate
functionality that is not available on all devices; refer to the notes.
1.1
The major features of the MPC826xA family are as follows:
2
MCC1
Parallel I/O
Generators
Baud Rate
Notes:
1
2
3
Timers
4
MPC8264
MPC8265
MPC8266
MCC2
Dual-issue integer core
— A core version of the EC603e microprocessor
— System core microprocessor supporting frequencies of 150–300 MHz
— Separate 16-Kbyte data and instruction caches:
— PowerPC architecture-compliant memory management unit (MMU)
— Common on-chip processor (COP) test interface
G2 Core
Features
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
Communication Processor Module (CPM)
FCC1
TC Layer Hardware
8 TDM Ports
Interrupt
Controller
32-bit RISC Microcontroller
FCC2
and Program ROM
FCC3
MPC826xA (HiP4) Family Hardware Specifications
4
5
6
5
Not on MPC8255
4 TDM ports on the MPC8255
2 MII ports on the MPC8255
1,3
16 Kbytes
16 Kbytes
4
D-Cache
I-Cache
D-MMU
I-MMU
Dual-Port RAM
SCC1
32 Kbytes
Figure 1. MPC8266 Block Diagram
Microcode
IMA
SCC2
1,3
SCC3
Time Slot Assigner
Ports
3 MII
Serial Interface
4 Virtual
DMAs
Serial
IDMAs
6
SCC4
SMC1
2 UTOPIA
Ports
System Interface Unit
SMC2
Memory Controller
System Functions
Bus Interface Unit
Clock Counter
60x-to-Local
60x-to-PCI
Bridge
Bridge
(SIU)
Non-Multiplexed
SPI
2,3
I/O
I
2
C
32 bits, up to 66 MHz
32 bits, up to 83 MHz
60x Bus
PCI Bus
Local Bus
MOTOROLA
or
2,3

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