mpc82x54a Megawin Technology, mpc82x54a Datasheet
mpc82x54a
Related parts for mpc82x54a
mpc82x54a Summary of contents
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... In-Application Program (IAP) .......................................................................................63 Avoid Inadvertent Data Lost from IAP/ISP ...................................................................64 This document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this product without notice. © Megawin Technology Co., Ltd. 2005 All right reserved. MPC82x54A 8-bit micro-controller 2007/12 version A7 MEGAWIN ...
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... Instructions Set................................................................................................................65 Absolute Maximum Rating (MPC82E54A) ...................................................................68 DC Characteristics (MPC82E54A).................................................................................68 Absolute Maximum Rating (MPC82L54A) ...................................................................69 DC Characteristics (MPC82L54A).................................................................................69 Package Dimension.........................................................................................................70 Revision History .............................................................................................................74 2 MPC82x54A Data Sheet MEGAWIN ...
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... Greater than 100 years data rentention under room temperature Very low power consumption Operating Voltage: - 4.5V~5.5V for MPC82E54A - 2.4V~3.6V for MPC82L54A, minimum 2.7V requirement in flash write operation (ISP/ICP/…...) - Built-in Low-Voltage Detector and Reset circuit. Operating Temperature - Industrial (-40°C to +85°C)* Maximum Operating Frequency 24MHz, Industrial range MEGAWIN MPC82x54A Data Sheet 3 ...
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... More package type: PDIP-20/28:MPC82x54AE/AE2 PLCC-32: MPC82x54AP SOP-20/28:MPC82x54AS/AS2 SSOP-28: MPC82x54AS3 TSSOP-20/28:MPC82x54AT/AT2 *: Tested by sampling 4 MPC82x54A Data Sheet MEGAWIN ...
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... The Pulse-Width-Modulator (PWM) mode in Programmable Counter Array (PCA) makes the device to drive the peripheral step motor or LED in least cost. The MPC82x54A is really the most efficient MCU adapted for simple control, such as: electronic scales, remote controller, security encoder/decoder, and user interface controller. ...
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... O XTALO: = Output from the inverting oscillator amplifier XTALI: = Input to amplifier P3.2: = General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output. INT0: = External interrupt source MPC82x54A Data Sheet the inverting oscillator MEGAWIN ...
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... CEX3: = Capture Event trigger to Programmable Counter Array (PCA) module-3 or PWM output BU P2.5: = General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output Ground BU P2.6: = General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output. MPC82x54A Data Sheet 7 ...
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... General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output. AIN3: = Alternative ADC input 16 BU P1.4: = General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output. SS: = Serial mode Selector or Chip-Enabling pin for Serial Peripheral Interface (SPI) AIN4: = MPC82x54A Data Sheet MEGAWIN ...
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... General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output. CEX2: = Capture Event trigger to Programmable Counter Array (PCA) module-2 or PWM output BU P2.1: = General purpose 4-state I/O port with internal pull-up mechanism; can be configured as open-drain output Power supply MPC82x54A Data Sheet 9 ...
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... P1.7/SPICLK/AIN7 TXD/P3.1 P1.6/MISO/AIN6 XTAL2 P1.5/MOSI/AIN5 XTAL1 P1.4/SS/AIN4 INT0/P3.2 P1.3/AIN3 INT1/P3.3 P1.2/AIN2 ECI/T0/P3.4 P1.1/AIN1 CEX1/T1/P3.5 P1.0/AIN0 P2.4/CEX3 P3.7/CEX0 P2.5 VSS SkinnyDIP-28/SOP-28/SSOP-28/TSSOP- PLCC-32 MPC82x54A Data Sheet 28 VCC P2 P2.0/CEX2 4 25 P1.7/SPICLK/AIN7 5 24 P1.6/MISO/AIN6 6 23 P1.5/MOSI/AIN5 7 22 P1.4/SS/AIN4 8 P1.3/AIN3 ...
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... XTAL2 MEGAWIN RAM ADDR RAM256 Register Stack Pointer TMP2 TMP1 ALU PSW WDT Port1 Latch ADC Port1 Driver 8 P1.0 ~ P1.7 P1.0 ~ P1.7 P3.0~P3.5,P3.7 MPC82x54 Block Diagram MPC82x54A Data Sheet Flash ROM ISP Timer0 Address Generator Timer1 Program Counter UART PCA & SPI Port0/2/3 Latch Port0/2/3 Driver P0.0 ~ P0.3 P2.0 ~ P2.7 11 ...
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... P3M1 00000000 P1M1 P0M0 P0M1 00000000 xxxx0000 xxxx0000 TL0 TL1 TH0 00000000 00000000 00000000 DPL DPH SPISTAT 00000000 00000000 00xxxxxx MPC82x54A Data Sheet 5/D 6/E 7/F CCAP3H 00000000 xxxxxx00 CCAP3L 00000000 IFMT SCMD ISPCR xxxxxx00 xxxxxxxx 00000000 CCAPM3 x0000000 ADCTL ADCV PCON2 000000000 ...
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... PSPI PS _LVD _ADC B9H BEH - - - - C5H ADCON ADCI SPEED1 SPEED0 C6H ADCV.9 ADCV.8 ADCV.7 ADCV.6 ADCV.5 ADCV.4 ADCV.3 ADCV.2 00000000B C7H - - - - MPC82x54A Data Sheet INITIAL LSB VALUE xxxx1111B 00000111B 00000000B 00000000B - - - - 00xxxxxxB CPOL CPHA SPR1 SPR0 00000100B 00000000B GF1 GF0 PD IDL ...
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... F3H - - - - F4H - - - - F5H - - - - F9H FAH FBH FCH FDH MPC82x54A Data Sheet RS0 00000000B CCF3 CCF2 CCF1 CCF0 00xx0000B - CPS1 CPS0 ECF 0xxxx000B MAT0 TOG0 PWM0 ECCF0 x0000000B MAT1 TOG1 PWM1 ECCF1 x0000000B MAT2 TOG2 PWM2 ECCF2 x0000000B MAT3 ...
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... Memory Organization Address Space for MPC82x54A RAM AP Memory Address Space for MPC82x54A embedded Flash memory MEGAWIN 00-7F RAM, Access it via direct addressing 80-FF SFR, Access it via direct addressing 80-FF indirect on-chip RAM, Access it via indirect addressing 0000-00FF On-Chip External auxiliary RAM. ISP IAP Memory ...
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... Nonvolatile Registers: There are four Nonvolatile Registers named OR0, OR1, OR2, and OR3 individually. They are designed to configure the MPC82x54A, i.e.,: to decide to use internal RC oscillator or use crystal oscillator as oscillating source allocate the built-in flash for application program, application data and In-System-Program code. ...
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... The bit is reserved for afterward user, and should be left at set. MEGAWIN . (ISP code could take 3.5K bytes (ISP code could take 2.5K bytes (ISP code could take 1.5K bytes) H Bit-5 Bit-4 Bit-3 Bit-5 Bit-4 Bit-3 reserved1 - MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 - means no IAP memory. B Bit-2 Bit-1 Bit-0 reserved1 ENROSC reserved1 17 ...
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... If the bit HWENW is left 1, those three bits makes no sense. {0,0,0}:= The frequency of the clock source for the watch-dog-timer is divided by 2. {0,0,1}:= The frequency of the clock source for the watch-dog-timer is divided Bit-5 Bit-4 Bit-3 - HWWIDL MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 HWPS2 HWPS1 HWPS0 MEGAWIN ...
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... The frequency of the clock source for the watch-dog-timer is divided by 256 Embedded Flash There is totally 15.5 Kbyte flash embedded in the MPC82x54A. The user can configure the whole flash to store the application program, can configure the flash for both storage of application (AP) program and In-System-Program (ISP) code, or even can configure the flash for storage of AP, ISP, and In-Application-Program (IAP) memory ...
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... Functional Description I/O Port Configuration All 27 port pins on MPC82x54A may be independently configured to one of four modes: quasi-bidirectional (standard 8051 port output), push-pull output, open-drain output or input-only. All port pins default to quasi-bidirectional after reset. Each port pin has a Schmitt-triggered input for improved input noise rejection. During power-down, all the Schmitt-triggered inputs are disabled with the exception of P3 ...
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... When this occurs, the strong pull-up turns on for two CPU clocks, quickly pulling the port pin high. MEGAWIN Bit-4 Bit-3 P3M14 P3M13 Port Mode Quasi-bidirectional (default) Push-Pull output Input Only (High-impedance) Open-Drain Output MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 P3M12 P3M11 P3M10 21 ...
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... Port latch data Input-only Mode The input-only configuration is a Schmitt-triggered input without any pull-up resistors on the pin. Input data 22 VDD 2 clocks delay Strong Very weak Input data Input data Port pin MPC82x54A Data Sheet VDD VDD Weak Port pin Port pin MEGAWIN ...
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... The push-pull mode may be used when more source current is needed from a port output. Port latch data Input data MEGAWIN VDD MPC82x54A Data Sheet Port pin 23 ...
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... Timer/Counter MPC82x54A has two 16-bit timers, and they are named T0 and T1. Each of them can also be used as a general event counter, which counts the transition from Since the MPC82x54A is a RISC-like MCU which executes faster than traditional 80C51 MCU from other providers. Based on consideration of compatibility with traditional 80C51 MCUs, the frequency of the clock source for T0 and T1 is designed to be selectable between oscillator frequency divided-by-12 (default) or oscillator frequency ...
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... IT0: = Interrupt-0 type control bit. 0:= (default) Set the interrupt-0 triggered by low duty from pin EX0 1:= Set the interrupt-0 triggered by negative falling edge from pin EX0 MEGAWIN Bit-4 Bit-3 TR0 IE1 MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 IT1 IE0 IT0 25 ...
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... Enable the SPI functional block to generate interrupt to the MCU ENLVFI: = Enable/Disable interrupt from low-voltage sensor 0:= (default) Inhibit the low-voltage sensor functional block to generate interrupt to the MCU 1:= Enable the low-voltage sensor functional block to generate interrupt to the MCU 26 Bit-4 Bit-3 EADCI ESPI ENLVFI MPC82x54A Data Sheet Bit-2 Bit-1 Bit MEGAWIN ...
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... The reload leaves THx unchanged. Mode 2 operation is the same for Timer0 and Timer1. OSC/12 0 OSC pin AUXR.x (sampled) C//T GATE /INTx MEGAWIN 0 0 TLx[4:0] THx[7: TRx 0 0 TLx[7:0] THx[7: TRx 0 TLx [7: TRx MPC82x54A Data Sheet Interrupt TFx Interrupt TFx TFx Interrupt Reload THx [7:0] 27 ...
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... TR1, TF1 from Timer1. TH0 now controls the Timer1 interrupt. OSC/12 0 OSC 1 Sampled T0 pin AUXR.x C//T GATE /INT0 OSC/12 0 OSC 1 TR1 AUXR TL0 [7: TR0 0 TH0 [7:0] 1 MPC82x54A Data Sheet Interrupt TF0 Interrupt TF1 MEGAWIN ...
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... Interrupt There are seven interrupt sources available in MPC82x54A. Each interrupt source can be individually enabled or disabled by setting or clearing a bit in the SFR named IE. This register also contains a global disable bit (EA), which can be cleared to disable all interrupts at once. Each interrupt source has two corresponding bits to represent its priority. One is located in SFR named IPH, and the other in IP register ...
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... Disable 1:= Enable ES:=Interrupt controller of Universal Asynchronous Receiver/Transmitter (UART). 0:=(default) Disable 1:= Enable ET1:=Interrupt controller of Timer-1 interrupt. 0:=(default) Disable 1:= Enable EX1:=Interrupt controller of external interrupt-1. 0:=(default) Disable 1:= Enable 30 Bit-4 Bit-3 ES ET1 MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 EX1 ET0 EX0 MEGAWIN ...
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... IP and IPH are combined to form 4-level priority interrupt as the following table. {IPH.x , IP. MEGAWIN Bit-4 Bit-3 PS PT1 Bit-5 Bit-4 Bit-3 PSH PT1H Priority Level 1 (highest MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 PX1 PT0 PX0 Bit-2 Bit-1 Bit-0 PX1H PT0H PX0H 31 ...
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... ADCI EADCI A UXR.4 Individual Enable CCF0 ECCF0 CCF1 ECCF1 CCF2 ECCF2 CCF3 ECCF3 CF ECF LVF ENLVFI 32 IE Register IPH and IP Registers Global Enable Interrupt Control Block MPC82x54A Data Sheet Highest Priority Level Interrupt Interrupt Polling Sequence Lowest Priority Level Interrupt MEGAWIN ...
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... Watch Dog Timer The watch dog timer in MPC82x54A consists of an 8-bit pre-scalar timer and a 15-bit timer. The timer is one-time enabled by setting ENW. Clearing ENW can not stop WDT counting. When the WDT is enabled, software should always reset the timer by writing 1 to CLRW bit before the WDT overflows. If MPC82x54A is out of control by any disturbance, that means the CPU can not run the software normally then WDT may miss the “ ...
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... MPC82x54A Data Sheet MEGAWIN ...
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... Universal Asynchronous Serial Port (UART) The serial port of MPC82x54A is duplex. It can transmit and receive simultaneously. The receiving and transmitting of the serial port share the same SFR SBUF, but actually there are two SBUF registers implemented in the chip. One is for transmitting and the other is for receiving ...
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... TI:= Transmitting done flag. After a transmitting has been finished, the hardware will set this bit. RI:= Receive done flag. After reception has been finished, the hardware will set this bit. 36 SMOD (Timer-1 overflow rate) 32 Bit-4 Bit-3 REN TB8 MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 RB8 TI RI MEGAWIN ...
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... RI in SFR SCON. Normally, an UART will set bit RI whenever it has done a byte reception; but, for the UART in the MPC82x54A, if the bit SM2 is set, it will set RI according to the following formula (SM2 == 1) && (SBUF == Compared Byte) && (RB8 == 1) In other words, not all data reception will respond to RI while specific data does. By setting the SADDR and the SADEN, the user can filter out those data byte that doesn’ ...
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... To start the PCA counting, the CR bit (CCON.6) must be set by software; oppositely, clearing bit CR will shut off the PCA. There is a bit named CF in SFR CCON. The 38 Module-0 Capture/Compare Register Module-1 Capture/Compare Register Module-2 Capture/Compare Register Module-3 Capture/Compare Register Programmable Counter Array MPC82x54A Data Sheet P3.7/CEX0 P3.5/CEX1 P2.0/CEX2 P2.4/CEX3 MEGAWIN ...
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... MEGAWIN CIDL - - CPS1 CPS0 - - CCF3 CCF2 PCA Timer/Counter Bit-4 Bit Bit-4 Bit CCF3 MPC82x54A Data Sheet To PCA module CH CL PCA interrupt 16-bit counter CMOD ECF CCON CCF1 CCF0 Bit-2 Bit-1 Bit-0 CPS1 CPS0 ECF Bit-2 Bit-1 Bit-0 CCF2 CCF1 CCF0 39 ...
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... CCON register to be set when there is a match between the PCA counter and the module’s Capture/Compare register. The next two bits CAPNn and CAPPn determine the edge type that a capture input will be active on. The CAPNn bit enables the negative edge, and the CAPPn bit enables the positive 40 MPC82x54A Data Sheet MEGAWIN ...
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... Bit-4 Bit-3 Bit-4 Bit-3 Bit-4 Bit-3 Bit-4 Bit-3 Bit-4 Bit-3 Bit-4 Bit-3 Bit-4 Bit-3 CAPN0 MAT0 TOG0 Bit-4 Bit-3 MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit-0 Bit-2 ...
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... Inhibit the interrupt (CCFn) from module-n to the MCU 1:= Permit the interrupt (CCFn) from module-n to the MCU 42 CAPN1 MAT1 TOG1 Bit-4 Bit-3 CAPN2 MAT2 TOG2 Bit-4 Bit-3 CAPN3 MAT3 TOG3 MPC82x54A Data Sheet PWM1 ECCF1 Bit-2 Bit-1 Bit-0 PWM2 ECCF2 Bit-2 Bit-1 Bit-0 PWM3 ECCF3 MEGAWIN ...
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... CEXn 16-bit Software Timer 16-bit High Speed Output 8-bit PWM CCON - CCF3 CCF2 CCF1 CCF0 - CAPTURE MDnCON CAPPn CAPNn MATn TOGn PWMn ECCFn PCA Capture Mode MPC82x54A Data Sheet Module function PCA interrupt CH CL CCAPnH CCAPnL 43 ...
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... EPCnL, CCAPnL[7:0]} , PWM output LOW else EPCnH := Reloaded value of EPCnL while CL[7:0] counts from FF 44 Bit-4 Bit Bit-4 Bit Bit-4 Bit Bit-4 Bit MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 - EPC0H EPC0L Bit-2 Bit-1 Bit-0 - EPC1H EPC1L Bit-2 Bit-1 Bit-0 - EPC2H EPC2L Bit-2 Bit-1 Bit-0 - EPC3H ...
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... CCF3 CCF2 CCF1 CCF0 - CCAPnH CCAPnL 16-bit MATCH comparator ECOMn CAPPn CAPNn MATn TOGn PCA High-Speed Ouput Mode MPC82x54A Data Sheet CCON CCF1 CCF0 PCA interrupt To CCFn CCAPMn PWMn ECCFn 0 CCON PCA interrupt To CCFn Toggle CCAPMn PWMn ECCFn 0 CEXn 45 ...
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... { [7:0 ]} >= { nL[7 9 ode MPC82x54A Data Sheet MEGAWIN ...
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... Permuting those states from polarity and phase, there MEGAWIN Shift In Register Shift Out Register SPI Control SSIG SPEN DORD MSTR CPOL CPHA SPIF WCOL - - - - SPI block diagram MPC82x54A Data Sheet P1.6 (MISO) P1.5 (MOSI) I/O control P1.7 (SPICLK) P1.4 (SS) SPR1 SPR0 SPICTL SPISTAT - - 47 ...
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... SPI-MODE-0, SPI-MODE-1, SPI-MODE-2, and SPI-MODE-3. Many device declares that they meet SPI mechanism, but few of them are adaptive to all four modes. The MPC82x54A is flexible enough to be configured to communicate to another device with MODE-0, MODE-1, MODE-2 or MODE-3 SPI, and play part of Master and Slave ...
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... InActive Slave Hi-Z input input output input input Master input output output Slave output input input Master input output output MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 Bit-2 Bit-1 Bit Remark SPI is disabled. Selected as slave Not selected. Convert from Master to Slave SPICLK depends on CPOL ...
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... SPI single master multiple slaves configurartion 50 MISO MISO MOSI MOSI SPICLK SPICLK Port Pin SS MISO MISO MOSI MOSI SPICLK SPICLK SS SS MISO MISO MOSI MOSI SPICLK SPICLK Port Pin 1 SS MISO MOSI SPICLK Port Pin 2 SS MPC82x54A Data Sheet Slave Slave/Master Slave #1 Slave #2 MEGAWIN ...
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... However, the received byte must be read from the data register (SPIDAT) before the next byte has been completely transferred. Otherwise the previous byte is lost. WCOL can be cleared in software by “writing 1 to the bit”. MEGAWIN MPC82x54A Data Sheet 51 ...
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... MISO turns to output MSB LSB MOV SPDAT,#data in software MPC82x54A Data Sheet LSB 5 6 MSB 2 1 LSB 5 6 MSB LSB 5 6 MSB 2 1 LSB 5 6 MSB 7 ...
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... LSB MOV SPDAT,#data in software DORD=0 MSB DORD=1 LSB MPC82x54A Data Sheet 7 8 SPEN=0 or MSTR=0, MOSI switched not to output data of SPI communication, also SPICLK is released from SPI control 2 1 LSB 5 6 MSB 2 1 LSB 5 6 MSB ...
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... A/D converter. V internal voltage-scaling DAC use, and the typical sink current 600uA ~ 1mA. For MPC82x54A, these two references are internally tied to VDD and GND, separately. Conversion is invoked since ADCS bit is set. Prior to ADC conversion, the desired I/O ports for analog inputs should be configured as input-only or open-drain mode first. The conversion takes around a fourth cycles to sample analog input data and other three fourths cycles in successive-approximation steps. Total conversion time is controlled by two register bits – ...
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... Bit The {ADCV[7:0], ADCVL[1:0]} is the final result from the A/D conversion. MEGAWIN Bit-4 Bit-3 ADCI ADCS Bit-4 Bit-3 ADCV.6 ADCV.5 Bit-4 Bit MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 CHS2 CHS1 CHS0 Bit-2 Bit-1 Bit-0 ADCV.4 ADCV.3 ADCV.2 Bit-2 Bit-1 Bit-0 - ADCV.1 ADCV.0 ...
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... Built-In Oscillator There is an oscillator built in the MPC82x54A which can be used as the oscillating source replacing the external crystal oscillator in some specific applications. To enable the built-in oscillator, an user must configure the device by clearing(enable) the bit ENROSC in NVM register OR2 via a general writer. ...
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... Divider for system clock A clock divider(CLKDIV) in the frond end of the device is designed to slow down the operation speed of MPC82x54A, and by doing that is to save the operating power dynamically. Different from the same register in MPC82x54A MCU, the content in PCON2 is always effective without the need to operate in IDLE mode. ...
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... It must be cleared by the user’s software. PD:= Power-Down switch Set this bit to drive the device enter POWER-DOWN mode. IDL:= Idle flag Set this bit to drive the device enter IDLE mode. 58 Bit-4 Bit-3 POF GF1 MPC82x54A Data Sheet Bit-2 Bit-1 Bit-0 GF0 PD IDL MEGAWIN ...
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... Any positive pulse from RST pin must be kept at least 10us plus 36 oscillation cycles, or the device cannot be reset. WDT overflow, LVD reset, and Software reset SWBS keeps unchanged If (SWBS==1) { Boot from ISP code else Boot from AP code end MEGAWIN MPC82x54A Data Sheet 59 ...
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... Furthermore quite complex timing procedure to erase/program flash. Fortunately, the MPC82x54A carried with convenient mechanism to help the user read/change the flash content. Just filling the target address and data into several SFR, and triggering the built-in ISP automation, the user can easily erase, read, and program the embedded flash. ...
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... Bit-6 Bit-5 SCMD is the command port for triggering ISP activity. If SCMD is filled with sequential 46 ISPCR ISP activity will be triggered. When this register is read, the device ID of MPC82x54A will be returned (2 bytes). The MSB byte of this device and LSB byte 04 H SFR: ISPCR (ISP Control register) ...
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... ISP activity */ Program a byte into flash /* choice byte-read command */ /* set ISPEN=1 to enable flash change. B set WAIT=010, 11 MC; assumed 10M X’s*/ /* specify the address to be read */ /* trig ISP activity */ Read a byte from flash MPC82x54A Data Sheet MEGAWIN ...
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... ISP memory. If the AP program desires to change the ISP memory associated with specific address space, the hardware will ignore it. MEGAWIN /* set SWBS=0 to boot from AP entrance. B set SWRST=1 to trigger software reset*/ /* set SWBS=1 to boot from ISP entrance. B set SWRST=1 to trigger software reset*/ MPC82x54A Data Sheet 63 ...
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... Low-Voltage-Reset function by clearing bit ENLVR (OR0.6) to makes this device never work under Low-Voltage. Also the user should make great use of LVF (PCON.5) and ENLVFI (AUXR.2) to detect the voltage dropping. 64 MPC82x54A Data Sheet MEGAWIN ...
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... DEC direct DECREMENT DIRECT BYTE DEC @Ri DECREMENT INDIRECT RAM INC DPTR INCREMENT DPTR MUL AB MULTIPLY A AND B DIV AB DIVIDE DECIMAL ADJUST ACC MEGAWIN DATA TRASFER DESCRIPTION ARITHEMATIC OPERATIONS DESCRIPTION MPC82x54A Data Sheet BYT CYC ...
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... JB bit, rel JUMP IF DIRECT BIT IS SET JNB bit, rel JUMP IF DIRECT BIT NOT SET JBC bit, rel JUMP IF DIRECT BIT IS SET AND THEN CLEAR BIT 66 LOGIC OPERATION DESCRIPTION DESCRIPTION BOOLEAN VARIABLE BRANCH DESCRIPTION MPC82x54A Data Sheet BYT CYC ...
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... COMPARE IMMEDIATE DATA TO INDIRECT RAM AND JUMP IF NOT CJNE @Ri, #data, rel EQUAL DJNZ Rn, rel DECREMENT REGISTER AND JUMP IF NOT EQUAL DJNZ direct, rel DECREMENT DIRECT BYTE AND JUMP IF NOT EQUAL NOP NO OPERATION MEGAWIN PROAGRAM BRACHING DESCRIPTION MPC82x54A Data Sheet BYT CYC ...
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... V =0.45V PIN V =2.4V PIN V =2.4V PIN V =0.45V PIN V =0.45V PIN PIN CC V =1.8V PIN F = 12MHz OSC F = 12MHz OSC V =5. =5.0V CC MPC82x54A Data Sheet Rating Unit °C ° 400 Limits Unit min typ max 2.0 V 3 220 ...
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... V =0.45V PIN V =2.4V PIN V =2.4V PIN V =0.45V PIN V =0.45V PIN PIN CC V =1.4V PIN F = 12MHz OSC F = 12MHz OSC V =3. =3.3V CC MPC82x54A Data Sheet Rating Unit °C ° 400 Limits Unit min typ max 2.0 V 2 ...
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... Package Dimension 20-pin PDIP (MPC82X54AE) 28-pin PDIP (MPC82X54AE2) 70 MPC82x54A Data Sheet MEGAWIN ...
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... SOP (MPC82X54AS) 28-pin SOP (MPC82X54AS2) MEGAWIN MPC82x54A Data Sheet 71 ...
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... TSSOP (MPC82X54AT) 28-pin TSSOP (MPC82X54AT2) 72 MPC82x54A Data Sheet MEGAWIN ...
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... PLCC (MPC82X54AP) 28-pin SSOP (MPC82X54AS3) MEGAWIN MPC82x54A Data Sheet 73 ...
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... Initial issue. - Increase available package SSOP-28. - Revises the possible operating temperature. - Add special note on low voltage detector. - Modify the storage temperature. - Modify the operation frequency reaches at 24 MHz. - Add 2.7V requirement in flash write operation. - Modify Absolute Maximum Rating. P68, 69 MPC82x54A Data Sheet MEGAWIN ...