mpc82x54a Megawin Technology, mpc82x54a Datasheet - Page 52

no-image

mpc82x54a

Manufacturer Part Number
mpc82x54a
Description
8-bit Micro-controller
Manufacturer
Megawin Technology
Datasheet
52
Typical Timing Diagram
Driven from the target slave
Control GPIO pin by software
SS pin (if SSIG bit = 0 )
Target slave SS pin
SS pin (if SSIG bit = 0 )
SS pin( if SSIG=0)
MISO (Input)
SPICLK(CPOL=0)
SPICLK(CPOL=1)
SPICLK(CPOL=0)
SPICLK(CPOL=1)
MOSI (Output)
Driven from Master
SPICLK(CPOL=0)
SPICLK(CPOL=1)
Driven from Master
Driven from Master
Driven from Master
Driven from Master
MOSI (input)
Driven from Master
Driven from Master
Driven from Master
MOSI (input)
MISO (output)
Clock Cycle
Clock Cycle
MISO (output)
Clock Cycle
SPEN=1 and MSTR=1, MOSI turns to output data
MISO turns to input data
DORD=0
DORD=1
SPICLK is strongly output-driving.
DORD=0
DORD=1
DORD=0
DORD=1
SPI master transfer format with CPHA=0
DORD=0
DORD=1
SPI slave transfer format with CPHA=0
SPI slave transfer format with CPHA=1
MSB
LSB
MOSI turns to input
MISO turns to output
MSB
LSB
MSB
LSB
MOSI turns to input
MISO turns to output
MSB
DORD=0
DORD=1
LSB
DORD=0
DORD=1
MOV SPDAT,#data in software
1
MPC82x54A Data Sheet
1
1
MSB
LSB
MSB
LSB
2
2
2
6
1
6
1
6
1
6
1
6
1
6
1
3
5
2
5
2
3
3
5
2
5
2
5
2
5
2
4
4
3
4
3
4
4
4
3
4
3
4
3
4
3
5
3
4
5
3
4
5
3
4
3
4
3
4
3
4
6
2
5
6
2
5
6
2
5
2
5
2
5
2
5
7
1
6
1
6
7
7
1
6
1
6
1
6
1
6
8
MSB
MSB
LSB
LSB
8
8
MSB
LSB
MSB
LSB
MSB
MSB
LSB
LSB
SPEN=0 or MSTR=0, MOSI switched not to output
data of SPI communication, also SPICLK is
released from SPI control
MEGAWIN

Related parts for mpc82x54a