mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 108

• Manufacturer Part Number: mpc8641
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Clocking
18.4.1
Table 70
clock to SYSCLK ratio. Note that frequencies between 400 MHz and 500 MHz are NOT supported on the
platform. See note regarding cfg_platform_freq in
configuration pin that is related to platform frequency.
18.4.2
Please note the following FIFO maximum speed restrictions based on platform speed.
For FIFO GMII mode:
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no more
than 127 MHz
For FIFO encoded mode:
than 167 MHz
108
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no more
FIFO TX/RX clock frequency <= platform clock frequency/4.2
FIFO TX/RX clock frequency <= platform clock frequency/3.2
shows some SYSCLK frequencies and the expected MPX frequency values based on the MPX
Table 70. Frequency Options of SYSCLK with Respect to Platform/MPX Clock Speed
SYSCLK to Platform Frequency Options
Platform to FIFO Restrictions
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
1
SYSCLK
MPX to
SYSCLK frequency range is 66-167 MHz. Platform clock/ MPX frequency
range is 400 MHz, 500-600 MHz.
Ratio
2
3
4
5
6
8
9
400
533
600
66
500
83
Platform/MPX Frequency (MHz)
Section 17, “Signal
SYSCLK (MHz)
100
400
500
600
111
555
133
400
533
Listings,” because it is a reset
1
167
500
Freescale Semiconductor