mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 24

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mpc8641

Manufacturer Part Number
mpc8641
Description
Integrated Host Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
DDR and DDR2 SDRAM
Figure 4
6.2.2
24
At recommended operating conditions.
MCK[n] cycle time, MCK[n]/MCK[n] crossing
MCK duty cycle
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCS[n] output setup with respect to MCK
MDQS[n]
MDQ[x]
shows the DDR SDRAM input timing for the MDQS to MDQ skew measurement (tDISKEW).
MCK[n]
MCK[n]
DDR SDRAM Output AC Timing Specifications
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Parameter
Table 21. DDR SDRAM Output AC Timing Specifications
Figure 4. DDR Input Timing Diagram for tDISKEW
600 MHz
533 MHz
400 MHz
600 MHz
533 MHz
400 MHz
600 MHz
533 MHz
400 MHz
600 MHz
533 MHz
400 MHz
t
t
MCK
DISKEW
t
MCKH
Symbol
t
t
t
DDKHAS
DDKHAX
DDKHCS
t
MCK
/t
MCK
1
D0
47.5
1.10
1.48
1.95
1.10
1.48
1.95
1.10
1.48
1.95
Min
47
47
3
D1
t
DISKEW
Max
52.5
10
53
53
Freescale Semiconductor
Unit
ns
ns
ns
ns
%
Notes
2
8
9
9
3
7
7
3
7
7
3
7
7

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