mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 12
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mpc8641
Manufacturer Part Number
mpc8641
Description
Integrated Host Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC8641.pdf
(130 pages)
- Current page: 12 of 130
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Electrical Characteristics
The recommended order of power down is as follows:
See
12
2. Dn_GV
3. SYSCLK
1. Dn_GV
2. All power rails other than DDR I/O (Dn_GV
Figure 3
for more details on the Power and Reset Sequencing details.
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
There is no required order sequence between the individual rails for this
item (# 1). However, V
their recommended value before the rail for Dn_GV
next step) reaches 10% of their recommended value. AV
must be delayed with respect to their source supplies by the RC time
constant of the PLL filter circuit described in
Supply Filtering.”
It is possible to leave the related power supply (Dn_GV
turned off at reset for a DDR port that will not be used. Note that these power
supplies can only be powered up again at reset for functionality to occur on
the DDR port.
SYSCLK may be powered down simultaneous to either of item # 1 or # 2 in
the power down sequence. Beyond this, the power supplies may power
down simultaneously if the preservation of DDRn memory is not a concern.
DD
DD
, Dn_MV
, Dn_MV
REF
REF
DD
_PLAT, AV
NOTE
NOTE
NOTE
DD
DD
, Dn_MV
_PLAT rails must reach 90% of
Section 20.2.1, “PLL Power
REF
DD
).
, and Dn_MV
DD
DD
, Dn_MV
type supplies
REF
REF
Freescale Semiconductor
(in
)
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