mpc8640 Freescale Semiconductor, Inc, mpc8640 Datasheet - Page 11

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mpc8640

Manufacturer Part Number
mpc8640
Description
Integrated Host Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
2.2
The MPC8640 requires its power rails to be applied in a specific sequence to ensure proper device
operation.
The chronological order of power up is:
The recommended order of power down is as follows:
See
Freescale Semiconductor
1. All power rails other than DDR I/O (Dn_GV
2. Dn_GV
3. 3. SYSCLK
1. Dn_GV
2. All power rails other than DDR I/O (Dn_GV
Figure 3
Power-Up/Down Sequence
for more details on the power and reset sequencing details.
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
The recommended maximum ramp up time for power supplies is 20
milliseconds.
There is no required order sequence between the individual rails for this
item (# 1). However, V
their recommended value before the rail for Dn_GV
next step) reaches 10% of their recommended value. AV
must be delayed with respect to their source supplies by the RC time
constant of the PLL filter circuit described in
Supply Filtering.”
It is possible to leave the related power supply (Dn_GV
turned off at reset for a DDR port that will not be used. Note that these power
supplies can only be powered up again at reset for functionality to occur on
the DDR port.
SYSCLK may be powered down simultaneous to either of item # 1 or # 2 in
the power down sequence. Beyond this, the power supplies may power
down simultaneously if the preservation of DDRn memory is not a concern.
DD
DD
, Dn_MV
, Dn_MV
REF
REF
DD
_PLAT, AV
NOTE
NOTE
NOTE
NOTE
DD
DD
DD
, and Dn_MV
, Dn_MV
_PLAT rails must reach 90% of
Section 20.2.1, “PLL Power
REF
DD
).
REF
, and Dn_MV
DD
DD
).
, Dn_MV
type supplies
REF
REF
Electrical Characteristics
(in
)
11

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