mpc8640 Freescale Semiconductor, Inc, mpc8640 Datasheet - Page 36

• Manufacturer Part Number: mpc8640
• Description: Integrated Host Processor
• Manufacturer: Freescale Semiconductor, Inc

1
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 17
8.2.5
When the eTSEC is configured for TBI modes, all clocks are supplied from external sources to the relevant
eTSEC interface. In single-clock TBI mode, when TBICON[CLKSEL] = 1 a 125-MHz TBI receive clock
is supplied on TSECn_RX_CLK pin (no receive clock is used on TSECn_TX_CLK in this mode, whereas
for the dual-clock mode this is the PMA1 receive clock). The 125-MHz transmit clock is applied on the
TSEC_GTX_CLK125 pin in all TBI modes.
A summary of the single-clock TBI mode AC specifications for receive appears in
36
At recommended operating conditions with L/TV
RX_CLK clock period
RX_CLK duty cycle
RX_CLK peak-to-peak jitter
Rise time RX_CLK (20%–80%)
Fall time RX_CLK (80%–20%)
RCG[9:0] setup time to RX_CLK rising edge
RCG[9:0] hold time to RX_CLK rising edge
±100 ppm tolerance on RX_CLK frequency
shows the TBI receive AC timing diagram.
TBI Single-Clock Mode AC Specifications
PMA_RX_CLK1
PMA_RX_CLK0
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
RCG[9:0]
Parameter
Table 34. TBI single-clock Mode Receive AC Timing Specification
Figure 17. TBI Receive AC Timing Diagram
t
t
DD
SKTRX
TRXH
t
TRDVKH
of 3.3 V ± 5% and 2.5 V ± 5%.
t
TRX
t
TRXH
Valid Data
t
t
TRRH/
t
Symbol
TRRDVKH
TRRDXKH
t
t
t
t
TRRR
TRR
TRRJ
TRRF
t
TRR
1
t
TRXF
Valid Data
Min
7.5
2.0
1.0
t
40
—
—
—
TRDXKH
t
TRXR
t
TRDVKH
Typ
8.0
50
—
—
—
—
—
t
TRDXKH
Table
Freescale Semiconductor
Max
250
8.5
1.0
1.0
60
—
—
34.
Unit
ns
ps
ns
ns
ns
ns
%