mpc5553 Freescale Semiconductor, Inc, mpc5553 Datasheet - Page 21

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mpc5553

Manufacturer Part Number
mpc5553
Description
Mpc5553 High Performance Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
Spec
All internal registers retain data at 0 Hz.
Up to the maximum frequency rating of the device (refer to
Loss of reference frequency is defined as the reference frequency detected internally, which transitions the PLL into
self-clocked mode.
The PLL operates at self-clocked mode (SCM) frequency when the reference frequency falls below f
measured on the CLKOUT ball with the divider set to divide-by-two of the system clock.
NOTE: In SCM, the MFD and PREDIV have no effect and the RFD is bypassed.
Use the EXTAL input high voltage parameter when using the FlexCAN oscillator in crystal mode (no quartz crystals or
resonators). (V
Use the EXTAL input low voltage parameter when using the FlexCAN oscillator in crystal mode (no quartz crystals or
resonators). (V
I
C
This specification applies to the period required for the PLL to relock after changing the MFD frequency control bits in the
synthesizer control register (SYNCR). From power up with crystal oscillator reference, the lock time also includes the crystal
startup time.
PLL is operating in 1:1 PLL mode.
V
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the PLL circuitry via V
for a given interval. CLKOUT divider is set to divide-by-two.
Values are with frequency modulation disabled. If frequency modulation is enabled, jitter is the sum of (jitter + Cmod).
Modulation depth selected must not result in f
f
19
20
21
22
xtal
sys
DDE
PCB_EXTAL
= f
is the oscillator bias current out of the XTAL pin with both EXTAL and XTAL pins grounded.
= 3.0–3.6 V
ico
CLKOUT period jitter,
measured at f
Frequency modulation range limit
ICO frequency
f
Predivider output frequency (to PLL)
ico
÷ (2
(do not exceed f
peak-to-peak jitter
Long term jitter
= [ f
and C
RFD
(clock edge to clock edge)
(averaged over 2 ms interval)
extal
xtal
ref
).
× (MFD + 4) ] ÷ (PREDIV + 1)
– V
PCB_XTAL
– V
Characteristic
SYS
extal
xtal
) must be ≥ 400 mV for the oscillator’s comparator to produce the output clock.
) must be ≥ 400 mV for the oscillator’s comparator to produce the output clock.
maximum
sys
are the measured PCB stray capacitances on EXTAL and XTAL, respectively.
Table 12. FMPLL Electrical Specifications (continued)
maximum)
12, 13
(V
DDSYN
DDSYN
MPC5553 Microcontroller Data Sheet, Rev. 2.0
= 3.0–3.6 V; V
and V
14
sys
SSSYN
15
value greater than the f
and variation in crystal oscillator frequency increase the jitter percentage
SS
Symbol
C
f
PREDIV
C
JITTER
f
= V
MOD
ico
Table
SSSYN
1).
= 0.0 V; T
sys
Minimum
maximum specified value.
0.8
48
A
4
= T
L
to T
H
)
Maximum
Electrical Characteristics
0.01
f
LOR
5.0
2.4
f
MAX
sys
. SCM frequency is
sys
f
%f
.
CLKOUT
MHz
MHz
Unit
%
SYS
21

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