mpc5553 Freescale Semiconductor, Inc, mpc5553 Datasheet - Page 45

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mpc5553

Manufacturer Part Number
mpc5553
Description
Mpc5553 High Performance Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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3.13.9
Freescale Semiconductor
1
2
CLOAD = 25 pF on all outputs. Pad drive strength set to maximum.
Spec
SS timing specified at F
T
pad delays, and slave pad delays.
FCK duty is not 50% when it is generated through the division of the system clock by an odd number.
A
2
3
4
5
6
7
8
External device data sample at
= T
L
FCK period (t
Clock (FCK) high time
Clock (FCK) low time
SDS lead / lag time
SDO lead / lag time
EQADC data setup time (inputs)
EQADC data hold time (inputs)
to T
EQADC data sample at
eQADC SSI Timing
H
, and CL = 50 pF with SRC = 0b11. Maximum operating frequency varies depending on track delays, master
FCK falling-edge
FCK rising-edge
Table 27. EQADC SSI Timing Characteristics (Pads at 3.3 V or 5.0 V)
FCK
Rating
SYS
= 1
= 132 MHz, V
SDO
SDS
FCK
÷
SDI
f
FCK
)
MPC5553 Microcontroller Data Sheet, Rev. 2.0
1, 2
DD
Figure 28. EQADC SSI Timing
= 1.35–1.65 V, V
Symbol
t
t
t
t
t
t
SDO_LL
SDS_LL
EQ_SU
EQ_HO
5
FCKHT
6
FCKLT
t
FCK
3
2
1st (MSB)
DDEH
4
t
t
SYS_CLK
SYS_CLK
7
Minimum
1st (MSB) 2nd
= 3.0–5.5 V, V
–7.5
–7.5
22
2
1
8
− 6.5
− 6.5
2nd
Typical
DD33
25th
and V
25th
9 × (t
8 × (t
26th
DDSYN
Maximum
Electrical Characteristics
SYS_CLK
SYS_CLK
+7.5
+7.5
= 3.0–3.6 V,
17
4
5
+ 6.5)
+ 6.5)
26th
t
SYS_CLK
Unit
ns
ns
ns
ns
ns
ns
45

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