mpc5553 Freescale Semiconductor, Inc, mpc5553 Datasheet - Page 22

• Manufacturer Part Number: mpc5553
• Description: Mpc5553 High Performance Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Electrical Characteristics
3.10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
22
Spec
Conversion characteristics vary with F
maximum value is based on 800 KS/s and the minimum value is based on 20 MHz oscillator clock frequency divided by a
maximum 16 factor.
Stop mode recovery time begins when the ADC control register enable bits are set until the ADC is ready to perform
conversions.
At V
Guaranteed 10-bit monotonicity.
The absolute value of the offset error without calibration ≤ 100 counts.
The absolute value of the full scale gain error without calibration ≤ 120 counts.
Below disruptive current conditions, the channel being stressed has conversion values of: 0x3FF for analog inputs greater than
V
amplifier. Other channels are not affected by non-disruptive conditions.
Exceeding the limit can cause a conversion error on both stressed and unstressed channels. Transitions within the limit do not
affect device reliability or cause permanent damage.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values using V
Condition applies to two adjacent pads on the internal pad.
The TUE specification is always less than the sum of the INL, DNL, offset, and gain errors due to canceling errors.
TUE does not apply to differential conversions.
Measured at 6 MHz ADC clock. TUE with a 12 MHz ADC clock is: –16 counts < TUE < 16 counts.
TUE includes all internal device errors such as internal reference variation (75% Ref, 25% Ref).
Depending on the input impedance, the analog input leakage current (DC Electrical specification 35a) can affect the actual
TUE measured on analog channels AN[12], AN[13], AN[14], AN[15].
10
11
12
13
1
2
3
4
5
6
7
8
9
RH
, and 0x000 for values less than V
RH
Stop mode recovery time
Resolution
ADC clock (ADCLK) frequency
Conversion cycles
INL: 6 MHz ADC clock
INL: 12 MHz ADC clock
DNL: 6 MHz ADC clock
DNL: 12 MHz ADC clock
Offset error with calibration
Full-scale gain error with calibration
Disruptive input injection current
Incremental error due to injection current. All channels have
same 10 kΩ < Rs <100 kΩ
Total Unadjusted Error for single ended conversions with
calibration
– V
Differential
Single ended
Channel under test has Rs = 10 kΩ,
I
eQADC Electrical Characteristics
INJ
RL
= I
= 5.12 V, one least significant bit (LSB) = 1.25, mV = one count.
INJMAX
11, 12, 13, 14, 15
3
, I
INJMIN
POSCLAMP
Table 13. eQADC Conversion Specifications (Operating)
Characteristic
2
= V
MPC5553 Microcontroller Data Sheet, Rev. 2.0
1
ADCLK
RL
7, 8, 9, 10
DDA
. This assumes that V
+ 0.5 V and V
rate. Reduced conversion accuracy occurs at maximum F
NEGCLAMP
RH
≤ V
GAINWC
OFFWC
Symbol
F
DNL12
INL12
DNL6
DDA
= – 0.3 V, then use the larger of the calculated values.
ADCLK
INL6
TUE
E
T
I
CC
—
INJ
INJ
SR
and V
RL
13 + 2 (15)
14 + 2 (16)
Minimum
≥ V
1.25
–3
–6
–4
–8
10
–4
–8
–1
–4
–4
1
SSA
4
4
5
6
due to the presence of the sample
13 + 128 (141)
14 + 128 (142)
Maximum
Freescale Semiconductor
3
4
8
12
—
—
6
4
8
1
4
4
ADCLK
4
4
5
6
rate. The
Counts
ADCLK
Counts
Counts
Counts
Counts
Counts
Counts
Counts
cycles
MHz
Unit
mV
mA
μs
3