adau1373 Analog Devices, Inc., adau1373 Datasheet - Page 155
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adau1373
Manufacturer Part Number
adau1373
Description
Low Power Codec With Speaker And Headphone Amplifier Adau1373
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADAU1373.pdf
(296 pages)
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DAIC REGISTER
Address: 0x46, Reset: 0x0A, Name: DAIC
Digital Audio Interface C Settings 1
Table 99. Bit Descriptions for DAIC
Bits
7
6
5
4
[3:2]
[1:0]
Bit Name
BCLKINVC
MSC
SWAPC
LRPC
WLC
FORMATC
Settings
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
Description
BCLK Inversion Control. Bit clock polarity inversion setting.
BCLK not inverted (default)
BCLK inverted
Master Mode Enable. Digital Audio Interface C master/slave setting.
Enable slave mode (default)
Enable master mode
Swap Audio Interface Data Control. Left/right channel data swap setting.
Output left- and right-channel data as normal (default)
Swap left- and right-channel DAC data in audio interface
Polarity Control for Clocks in Right-Justified, Left-Justified, and I
Polarity invert setting for frame clock.
Normal DACLRC and ADCLRC (default)
Invert DACLRC and ADCLRC polarity
Data-Word Length Control. Digital Audio Interface C data-word length
setting: 16/20/24/32 bits.
16 bits
20 bits
24 bits (default)
32 bits
Digital Audio Interface C Format Control. Digital Audio Interface C serial
format setting RJ/LJ/I
Right justified
Left justified
I
DSP mode
2
S format (default)
Rev. 0 | Page 155 of 296
2
S/DSP mode.
2
S Modes.
Reset
0x0
0x0
0x0
0x0
0x2
0x2
ADAU1373
Access
RW
RW
RW
RW
RW
RW
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