isp1302 NXP Semiconductors, isp1302 Datasheet - Page 20

• Manufacturer Part Number: isp1302
• Description: Isp1302 Universal Serial Bus On-the-go Transceiver With Carkit Support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1302_1
Product data sheet
8.3.1 Transparent UART mode
8.3.2 Transparent audio mode
8.3.3 Transparent general-purpose buffer mode
8.3.4 Data-during-audio mode
8.3 Transparent modes
When in transparent UART mode, an SoC (with the UART controller) communicates
through the ISP1302 to another UART device that is connected to its DP and DM lines.
The ISP1302 operates as a logic level translator between the following pins:
The ISP1302 is in transparent UART mode, if bit UART_EN of the Mode Control 1 register
is set.
In transparent audio mode, the ISP1302 will disable its DP and DM driver. The carkit
interrupt detector is enabled. Built-in analog switches, DC biasing circuits, and the
data-during-audio feature can be enabled by setting corresponding bits in the Carkit
Control register:
The ISP1302 is in transparent audio mode if bit UART_EN of the Mode Control 1 register
is cleared, bit AUDIO_EN of the Mode Control 2 register is set, and bit TRANSP_EN of
the Mode Control 1 register is cleared.
In transparent general-purpose buffer mode, the DAT/VP and SE0/VM pins are connected
to the DP and DM pins, respectively. The direction of the data transfer can be controlled
using bits TRANSP_BDIR1 and TRANSP_BDIR0 of the Mode Control 2 register as
specified in
The ISP1302 is in transparent general-purpose buffer mode, if bit UART_EN = 0, bit
AUDIO_EN = 0, bit DAT_SE0 = 1 and bit TRANSP_EN = 1.
This mode is a combination of audio mode and UART mode. The SPKR_R, SPKR_L and
MIC audio signals will be bypassed through the DP and DM lines. UART data bytes can
be transmitted or received on the DP and DM lines when the audio signal is running.
To transmit data, if the SE0/VM input changes level (either from HIGH to LOW or from
LOW to HIGH), a HIGH pulse will be generated on the DM line. The pulse voltage is above
2.9 V. The pulse width is between 200 ns and 500 ns. The data-during-audio transmitting
is enabled when the ISP1302 is in transparent audio mode and bit TX_PULSE_EN = 1.
To receive data, if a LOW pulse is detected on the DP line, the ISP1302 will toggle the
level on the DAT/VP pin. The data-during-audio receiving is enabled when the ISP1302 is
in transparent audio mode and bit RX_PULSE_EN = 1.
Table 13
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•
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For the TxD signal: from SE0/VM (V
For the RxD signal: from DP (VREG level) to DAT/VP (V
Stereo mode: SPKR_L on DM and SPKR_R on DP.
Mono and MIC mode: SPKR_L on DM and MIC on DP.
provides a summary of device operating modes.
Table
14.
Rev. 01 — 24 May 2007
CC(I/O)
USB OTG transceiver with carkit support
level) to DM (VREG level).
CC(I/O)
level).
© NXP B.V. 2007. All rights reserved.
ISP1302
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