sercon410b STMicroelectronics, sercon410b Datasheet

no-image

sercon410b

Manufacturer Part Number
sercon410b
Description
Sercos Interface Controller
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SERCON410B
Manufacturer:
ST
Quantity:
4 300
Part Number:
SERCON410B
Manufacturer:
ST
Quantity:
624
Part Number:
SERCON410B
Manufacturer:
ST
0
SERCON410B
DATASHEET

Related parts for sercon410b

sercon410b Summary of contents

Page 1

... SERCON410B DATASHEET ...

Page 2

USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein : 1. ...

Page 3

... CONTROL REGISTERS AND RAM DATA STRUCTURES . . . . . . . . . . . . . . . . . . . . 4.1 CONTROL REGISTER ADDRESSES . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 DATA STRUCTURES WITHIN THE RAM . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.1 Telegram Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.2 Data Containers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.3 End Marker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.4 Service Containers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ADDITIONAL SUPPORT AND TOOLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 SERCOS INTERFACE SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 SOFTWARE AND BOARDS FOR THE SERCON410B . . . . . . . . . . . . . . . . . . SERCON410B DATASHEET INDEX Page Number ...

Page 4

... SERCON410B NOTES: ...

Page 5

... RAM (single or double buffer) or transfer via DMA Synchronization by external signal Timing control signals Automatic service channel transmission 100-pin plastic flat-pack casing May 1994 This is Preliminary Data from SGS-THOMSON. Details are subject to change without notice. SERCON410B SERCOS INTERFACE CONTROLLER (Ordering Number: SERGBQA) PRELIMINARY DATA PQFP100 1/30 ...

Page 6

... SERCON410B Figure 1. SERCON410B Block Diagram 2/30 ...

Page 7

... Figure 2. SERCON410B Pin Configuration SERCON410B 3/30 ...

Page 8

... SERCON410B Figure 3. SERCOS Interface with Ring Connection Figure 4. SERCON410B with RS-485 bus Connection 4/30 ...

Page 9

... It is the direct link between the electro-optical receiver and transmitter and the mi- croprocessor that executes the control algorithms. The SERCON410B can be used both for SERCOS interface masters and slaves. The circuit contains the following functions (Fig. 1): - ...

Page 10

... SERCON410B 2 PIN DESCRIPTION Table 1. SERCON410B I/O Port Function Summary Signal (s) Pin (s) IO 77-80, 82-85, D15-0 I/O 87-90, 92-95 56-59, 61-64, A15-0 I/O 66-69, 71-74 ALEL, ALEH 54 RDN 51 I WRN 52 I BHEN 75 I MCSN0, 46,47 I MCSN1 PCSN0, 48,49 I PCS1 BUSYN 45 O DMAREQR 38 O DMAACKRN 40 I DMAREQT 39 O DMAREQTN 41 I ADMUX 96 I BUSMODE0, 97,98 I BUSMODE1 BUSWIDTH ...

Page 11

... PIN DESCRIPTION (Continued) Table 1. SERCON410B I/O Port Function Summary Signal (s) Pin (s) IO BYTEDIR 100 I INT0, INT1 44,43 O SREGEN 28 I SBAUD 29 I RxD RxC I/O 26 RECACTN O TxD1 O 16 22,21,2 TxD6 18,17 TxDNRZ TxC I/O IDLE O 25 30,31 TM0, TM1 I 32 L_ERRN O 34 CYC_CLK I 35 CON_CLK O DIV_CLK ...

Page 12

... SERCON410B PIN DESCRIPTION (Continued) Table 1. SERCON410B I/O Port Function Summary Signal (s) Pin (s) IO SCLKO2 6 O SCLKO4 5 O MCLK 4 I RSTN 10 I TEST 7 I OUTZ 11 I NDTRO 9 O 3,15,23, 33,42, V 50,60, SS 70,81, 91 1,8,19, 27,37 55,65, 76,86 8/30 (Continued) Function Clock output: outputs the SCLK clock divided by 2. Clock output: outputs the SCLK clock divided by 4. ...

Page 13

... 0 -55 to +150 Value Min. -40 4.75 Test Conditions Min. 2.4 All pins except D15-0, A15-0, ALEL, ALEH, RDN, WRN, BHEN, MCSN0-1, PCSN0, PCS1, DMAACKTN, DMAACKRN 0.6 SERCON410B Unit Unit Max 5. MHz 20 MHz 10 MHz Value Unit Typ. Max. ...

Page 14

... SERCON410B DC ELECTRICAL CHARACTERISTICS (Continued) Symbol Parameter Low Level Input Current I IL (Pull-up resistor) High Level Input Current Low level Output Voltage, OL all O- and I/O-pins except TXD6-1 High level output voltage all O- and I/O-pins except TXD6-1 High level output voltage, ...

Page 15

... DMAREQR/T, CON_CLK, DIV_CLK Figure 6. Timing of Clock SCLK 3.4.2 Clock Input SCLK Symbol Parameter f Clock Frequency SCLK SCLK t SCLK Low SCLK0 t SCLK High SCLK1 = - + Min Min. 6.5 6.5 SERCON410B Value Unit Type Max. 20 MHz Value Unit Type Max. 64 MHz ns ns 11/30 ...

Page 16

... SERCON410B AC ELECTRICAL CHARACTERISTICS (Continued) Figure 7. Timing of Serial Clock Inputs RxC and TxC and Related Signals 3.4.3 Serial Clock (SREGEN = 0, external clock regeneration, RxC and TxC are inputs) Symbol Parameter f Clock Frequency RxC, TxC RTXC t RxC, TxC Low RTXC0 t RxC, TxC High RTXX1 ...

Page 17

... Access time A6-0, BHEN, PCSN0, PCS1, t DMAACKNR, WRN (only Motorola mode) to PAD D15-0 valid t Access time RDN to D15-0 valid PRDD t Delay RDN to D15-0 high-Z RDZ t Delay RDN to DMAREQR low PRQ SERCON410B Value Min. Type Max Unit ...

Page 18

... SERCON410B AC ELECTRICAL CHARACTERISTICS (Continued) Figure 10. Read Access of Dual Port RAM 3.4.6 Read Access of Dual Port RAM Symbol Parameter Setup time A10-0, BHEN, MCSN0-1, WRN (only Motorola mode) to falling edge RDN t (Intel or Motorola mode with low active ASU strobe) or rising edge RDN (Motorola mode ...

Page 19

... RDN (Motorola mode, strobe active high) Pulse width WRN (Intel mode) or RDN t PWRW (Motorola mode) t Setup time D15-0 to end of write access DSU t Hold time D15-0 to end of write access DHD t Delay WRN or RDN to DMAREQT low PRQ SERCON410B Value Min. Type Max Unit ...

Page 20

... SERCON410B AC ELECTRICAL CHARACTERISTICS (Continued) Figure 12. Write Access to DUAL Port RAM 3.4.8 Write Access to Dual Port RAM Symbol Parameter Setup time A10-0, BHEN, MCSN0-1, WRN (only Motorola mode) to falling edge of t WRN (Intel mode) or RDN (Motorola mode ASU with low active strobe) or rising edge RDN ...

Page 21

... Baud rate selected by SWSBAUD pin R/W 1 Baud rate selected by SWSBAUD control bit R Level at pin SBAUD 0 Receive data is NRZI-coded R/W 1 Receive data is NRZI-coded Direct RAM write access R/W RAM write access internally synchronized 0 DMAREQR/DMAREQT are static signals R/W 1 DMAREQR/DMAREQT are pulses (Not used) SERCON410B Function / 17/30 ...

Page 22

... SERCON410B CONTROL REGISTER ADDRESSES (Continued) A6-1 Bit Name 0-5 ENTXD1-6 6 TXDMODE 7-9 TMODE0-2 2H 10-11 TM0-1 12 RDIST 13 FIBBR 14-15 LMODE0-1 0 INTFL0 1 ENINT0 2 POLINT0 3 INTFL1 4 ENINT1 5 POLINT1 3H 6 COMACT 7 COMBLK 8 ENTMT 9 FLTMT 10 FLRWAIT 11 FLREC 18/30 R/W Value 0 Pin TxDn has a high impedance R/W 1 Pin TxDn is outputting transmit data 0 TXDMODE R/W 1 TxD2-6 is outputting ENTXD2-6 ...

Page 23

... Interrupt end of transmit telegram R/W Interrupt start waiting for receive telegram R/W Interrupt start of receive telegram R/W Interrupt end of receive telegram R/W Interrupt error of receive telegram R/W Interrupt service container R/W Interrupt receive telegram missing twice R/W Interrupt time TINT0-3 R/W Interrupt DIVCLK signal R/W Interrupt programming error R/W Interrupt address change SERCON410B Function 19/30 ...

Page 24

... SERCON410B CONTROL REGISTER ADDRESSES (Continued) A6-1 Bit Name 6H 0-15 EN0_INT_n 7H 0-15 EN0_INT_n 8H 0-15 EN1_INT_n 9H 0-15 EN1_INT_n 0-7 PHAS0 OAH 8-15 PHAS1 0-7 PHASREC OBH 8-15 RECADR 0 MSTEN 1 MSTMASTER 2 COMBLK0 0CH 3 COMBLK1 4 CON_CLK 5 ENCONCLK 6 POLCONCLK 7 CYC_CLK 8 ENCYCCLK 20/30 R/W Value 0 Interrupt flag does not activate INT0 R/W 1 Interrupt flag activates INT0 Bit assignment same as for address 4H ...

Page 25

... Receive time window for MST 2 R Error flags W Clear error flags R/W Receive time window for data telegram 1 R/W Receive time window for data telegram 2 Time at which time interrupt 0 and first edge R/W of CON_CLK occur Time at which time interrupt 1 and second R/W edge of CON_CLK occur SERCON410B Function 21/30 ...

Page 26

... SERCON410B CONTROL REGISTER ADDRESSES (Continued) A6-1 Bit Name 1CH 0-15 TINT2 1DH 0-15 TINT3 1EH 0-15 TDIVCLK 1FH 0-15 DTDIVCLK 0-7 NDIVCLK 20H 8 POLDIVCLK 9-15 0-9 THTPT 21H 10-15 22H 0-15 THT 0-9 THWPT 23H 10-15 24H 0-15 THW 0-9 THRPT 10 MSTTCHK 11 PHAS12 25H 12 FLMDTADR 13-15 26H 0-15 THR 0-15 RFIFO 27H 0-15 TFIFO 22/30 R/W Value R/W Time at which time interrupt 2 occurs ...

Page 27

... Marker bit for telegram header of receive telegram. Marker bit for telegram header. Time for the start of telegram in s after end of MST. Length of telegram in data words (not including address). Word address within the RAM of the next telegram header or the end marker. (Not used) Error counter SERCON410B Function 23/30 ...

Page 28

... SERCON410B DATA STRUCTURES WITHIN THE RAM (Continued) A telegram header for transmit telegram comprises four control words: Index Bit 0-7 ADR 8 DMA 9 DBUF 10 VAL 0 11- 0-15 TRT 2 0-15 TLEN 0 10-15 24/30 Name Telegram address Data storage in the RAM (DMA = 0) or DMA transfer (DMA = 1). ...

Page 29

... Processing of service container in slave mode (SCMASTER = 0) or master mode (SCMASTER = 1). Last data container of the telegram (1) or further data containers follow (0). Position of the data block within the telegram in number of words. The first data record of a telegram has POS = 0 (only in case of receive telegrams). SERCON410B Function 25/30 ...

Page 30

... SERCON410B DATA STRUCTURES WITHIN THE RAM (Continued) 4.2.3 End Marker The end marker comprises two 16-bit words: Index Bit 0- 0-15 TEND 4.2.4 Service Containers A service container contains 5 control words and a buffer (BUFLEN words, max. length 255) (Fig. 14) Figure 14. Structure of Service Container ...

Page 31

... Pointer to last position in read buffer ERR_CNT Error counter BUSY_CNT Error counts differences of handshake (0) or BUSY cycles (1) INT_SC_ERR Interrupt due to protocol error INT_HS_TIMEOUT Interrupt due to handshake timeout INT_BUSY_TIMEOUT Interrupt BUSY timeout INT_CMD Slave has set command modification bit (Not used) SERCON410B Function 27/30 ...

Page 32

... SERCON410B DATA STRUCTURES WITHIN THE RAM (Continued) The coding of the five control words depends on the mode of the service channel. Using the slave mode (SCMASTER = 0) they have the following structure: Index Bit 4 8-9 10- 3 8-9 10-15 0-7 2 8-15 0-7 3 8-15 0 10-15 28/30 Name ...

Page 33

... PACKAGE MECHANICAL DATA Figure 15. SERCON410B 100 Pin Plastic Quad Flat Pack Package 6 ADDITIONAL SUPPORT AND TOOLS 6.1 SERCOS INTERFACE SPECIFICATION The SERCOS interface specification is available at: Fördergemeinschaft SERCOS interface e.V. Herseler Str. 31 D-50389 Wesseling Tel. xx49-2236-1517 Fax. xx49-2236-1542 6.2 SOFTWARE AND BOARDS FOR THE ...

Page 34

... SERCON410B NOTES: Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice ...

Related keywords