s1r72803 Epson Electronics America, Inc., s1r72803 Datasheet - Page 64

• Manufacturer Part Number: s1r72803
• Description: Link/transaction Controller
• Manufacturer: Epson Electronics America, Inc.

S1R72803F00A
Hardware SBP2 Control Register
Bit7 UltraDmaMode
Bit6 HOSTtoDev
Bit5 FromStream
Bit4 LastPT
Bit3 HwSBP2Rst
Bit2 HwSBP2Rsum
Bit1 HwSBP2Pause
Bit0 HwSBP2Start
60
Address Register Name
0x30
This register controls the SBP2 processing of this IC.
PtNotPresent:0 (Present) Set => PageTable exists.
PtNotPresent:1 (Not Present) Set => PageTable does not exist.
HOSTtoDev:0 (Host<-Device) Set => Transfers data from Device to Host.
HOSTtoDev:1 (Host->Device) Set => Transfers data from Host to Device.
FromStream:0 (FromPt) Set => Starts with the PageTable Processing.
FromStream:1 (FromStream) Set => Starts with the Stream processing.
This bit indicates the 0x32 bit 3 NotQuad status and specifies whether to generate an interrupt if SegmentLength
of the last PageTableElement on PageTable is not the Quad unit during the HwSBP2 process.
LastPT: 0 (None) Set => The NotQuad status is indicated for the last PageTableElement and an interrupt is
generated.
LastPT: 1 (Ignore) Set => The NotQuad status is not indicated for the last PageTableElement and an interrupt
is not generated.
SBP2Reset:1 (Reset) Set => Resets the hwSBP2.
If you read it, it indicates 0.
SBP2Resume:1 (Reset) Set => Resumes the hwSBP2 processing in pause.
If you read it, it indicates 0.
SBP2Pause:1 (Pause) Set => Pauses the hwSBP2 processing in execution.
If you read it, it indicates 0.
SBP2Start:1 (Start) Set => Starts the hwSBP2 processing.
If you read it, it indicates 0.
HwSBP2Ctl
7: PtNotPresent
6: HOSTtoDev
5: FromStream
4: LastPT
3: HwSBP2Rst
2: HwSBP2Rsum
1: HwSBP2Pause
0: HwSBP2Start
Bit Symbol
R/W
R/W
R/W
R/W
R/W
W
W
W
W
EPSON
0: Present
0: Host <– Device
0: From PageTable 1: FromStream
0: None
0: None
0: None
0: None
0: None
Description
1: Not Present
1: Host –> Device
1: Ignore
1: Reset
1: Resume
1: Pause
1: Start
H.Rst S.Rst B.Rst
0x00 0x00
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