lan8700 Standard Microsystems Corp., lan8700 Datasheet - Page 16

• Manufacturer Part Number: lan8700
• Description: ?15kv Esd Protected Mii/rmii 10/100 Ethernet Transceiver With Hp Auto-mdix Support And Flexpwrtm Technology In A Small Footprint
• Manufacturer: Standard Microsystems Corp.

Revision 2.0 (07-15-08)
SIGNAL NAME
SIGNAL NAME
nINTSEL
Note 3.1
TX_ER/
CLKIN/
RXD3/
XTAL1
XTAL2
TXD4
nRST
nINT/
Table 3.4 Boot Strap Configuration Inputs
On nRST transition high, the PHY latches the state of the configuration pins in this table.
TYPE
TYPE
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR
I/O
I/O
I/O
O
I
Table 3.5 General Signals
DATASHEET
nINT pin mode select: set the mode of pin 1.
Notes:For nINT mode, tie nINT/TXD4/TXER to VDDIO with a
resistor (see
on page
Notes:For TXD4/TXER mode, do not tie nINT/TXD4/TXER to
VDDIO or Ground.
LAN Interrupt – Active Low output. Place an external resistor
(see
page
Notes:
External Reset – input of the system reset. This signal is active
LOW. When this pin is deasserted, the mode register bits are
loaded from the mode pins as described in
Clock Input – 25 Mhz or 50 MHz external clock or crystal input.
In MII mode, this signal is the 25 MHz reference input clock
In RMII mode, this signal is the 50 MHz reference input clock
which is typically also driven to the RMII compliant Ethernet MAC
clock input.
Note:
Clock Output – 25 MHz crystal output.
Note:
Default, left floating pin 1 is nINT, active low interrupt output.
Pulled to VSS by a resistor, (see
Configuration Resistors,” on page
Transmit Error or Transmit data 4 (5B mode).
This signal is mux’d with TXER/TXD4
See
for additional details on Strapping options.
Table 4.3, “Boot Strapping Configuration Resistors,” on
32) pull-up to VCC 3.3V.
Section 4.10, "nINT/TX_ER/TXD4 Strapping," on page 31
16
32).
See
page 31
Float this pin if using an external clock being driven
through CLKIN/XTAL1
Table 4.3, “Boot Strapping Configuration Resistors,”
Section 4.10, "nINT/TX_ER/TXD4 Strapping," on
for additional details on Strapping options.
(Note
DESCRIPTION
DESCRIPTION
3.1) (continued)
Table 4.3, “Boot Strapping
32) pin 1 is TX_ER/TXD4,
SMSC LAN8700/LAN8700i
Section
TM
Technology in a Small Footprint
5.4.9.2.
Datasheet