lan8700 Standard Microsystems Corp., lan8700 Datasheet - Page 47

• Manufacturer Part Number: lan8700
• Description: ?15kv Esd Protected Mii/rmii 10/100 Ethernet Transceiver With Hp Auto-mdix Support And Flexpwrtm Technology In A Small Footprint
• Manufacturer: Standard Microsystems Corp.

±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR
Datasheet
SMSC LAN8700/LAN8700i
ADDRESS
ADDRESS
ADDRESS
31.15:13
31.11:10
30.15:8
31.9:7
31.4:2
30.7:1
31.12
31.6
31.5
31.1
31.0
30.0
29.1
29.0
Scramble Disable
Speed Indication
Enable 4B5B
Reserved
Autodone
Reserved
Reserved
Reserved
Mask Bits
GPO[2:0]
Reserved
Reserved
Reserved
NAME
NAME
NAME
INT1
Table 5.43 Register 29 - Interrupt Source Flags (continued)
Table 5.45 Register 31 - PHY Special Control/Status
Write as 0, ignore on read.
Auto-negotiation done indication:
General Purpose Output connected to signals
HCDSPEED value:
0 = Auto-negotiation is not done or disabled (or not
1 = Auto-negotiation is done
Note:
Write as 0, ignore on Read.
GPO[2:0]
0 = Bypass encoder/decoder.
1 = enable 4B5B encoding/decoding.
MAC Interface must be configured in MII mode.
Write as 0, ignore on Read.
[001]=10Mbps Half-duplex
[101]=10Mbps Full-duplex
[010]=100Base-TX Half-duplex
[110]=100Base-TX Full-duplex
Write as 0; ignore on Read
0 = enable data scrambling
1 = disable data scrambling,
Write as 0; ignore on read.
0 = interrupt source is masked
Write as 0; ignore on read
1 = Auto-Negotiation Page Received
0 = not source of interrupt
Ignore on read.
1 = interrupt source is enabled
Table 5.44 Register 30 - Interrupt Mask
active)
reads to register 31 do not clear status bits.
This is a duplicate of register 1.5, however
DATASHEET
TM
DESCRIPTION
DESCRIPTION
DESCRIPTION
47
Technology in a Small Footprint
MODE
MODE
MODE
Revision 2.0 (07-15-08)
RO/
RO/
RW
RO
RO
RW
RW
RW
RW
RW
RW
RW
LH
LH
RO
RO
DEFAULT
DEFAULT
DEFAULT
XXX
XX
X
0
0
0
0
0
0
0
1
0
0
0