lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 21

• Manufacturer Part Number: lan91c100
• Description: Feast ? Ast Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

I/O SPACE
The base I/O space is determined by the IOS0-2
inputs and the EEPROM contents. To limit the
I/O space requirements to 16 locations, the
registers are assigned to different banks. The
OFFSET Defines the address offset within the
IOBASE where the register can be accessed at,
provided the bank select has the appropriate
value.
The offset specifies the address of the even byte
(bits 0-7) or the address of the complete word.
The odd byte can be accessed using address
(offset + 1).
A special BANK (BANK7) exists to support the addition of external registers.
BYTE
BYTE
HIGH
LOW
A
C
E
0
2
4
6
8
bit 15
bit 7
RESERVED (0)
BANK SELECT
OFFSET
EPH STATUS
X
X
COUNTER
BANK0
MCR
RCR
TCR
MIR
bit14
bit 6
X
X
Table 2 - Internal I/O Space Mapping
BANK SELECT
bit 13
bit 5
CONTROL
NAME
PURPOSE
GENERAL
X
X
CONFIG
BANK1
BASE
IA0-1
IA2-3
IA4-5
bit 12
bit 4
21
X
X
last word of the I/O area is shared by all banks
and can be used to change the bank in use.
Registers are described using the following
convention:
Some registers (like the Interrupt Ack., or like
Interrupt Mask) are functionally described as
two eight bit registers, in that case the offset of
each one is independently specified.
Regardless of the functional description, all
registers can be accessed as doublewords,
words or bytes.
The default bit values upon hard reset are
highlighted
MMU COMMAND
TYPE
BANK SELECT
FIFO PORTS
INTERRUPT
bit 11
bit 3
PNR/ARR
POINTER
X
X
BANK2
DATA
DATA
below each register.
bit 10
bit 2
X
X
SYMBOL
BANK SELECT
REVISION
BANK3
MGMT
MT0-1
MT2-3
MT4-5
MT6-7
ERCV
bit 1
bit9
X
X
bit 0
bit8
X
X