lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 50
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lan91c100
Manufacturer Part Number
lan91c100
Description
Feast ? Ast Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN91C100.pdf
(101 pages)
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MDOE MII Management output enable. When
high pin MDO is driven, when low pin MDO is
tri-stated.
MCLK MII Management clock. The value of
this bit drives the MDCLK pin.
BYTE
BYTE
HIGH
LOW
OFFSET
8
0
0
MANAGEMENT INTERFACE
0
0
NAME
1
1
50
1
1
MDI MII Management input. The value of the
MDI pin is readable using this bit.
MDO MII Management output. The value of
this bit drives the MDO pin.
The purpose of this interface, along with the
corresponding pins, is to implement MII PHY
management in software.
MDOE
0
0
READ/WRITE
TYPE
MCLK
0
0
MDI Pin
MDI
1
SYMBOL
MGMT
MDO
1
0