lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 369

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lan9303m

Manufacturer Part Number
lan9303m
Description
Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
Manufacturer
Standard Microsystems Corp.
Datasheet
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
14.5.5
SYMBOL
t
t
t
t
t
hold
clkp
clkh
clkl
val
Px_OUTD[3:0]
Px_OUTCLK
Px_OUTDV
MII Interface Timing (PHY Mode)
This section specifies the MII interface input and output timing when in PHY mode. Please refer to
Chapter 9, "MII Data Interfaces," on page 128
Note 14.14 Timing was designed for system load between 10 pf and 25 pf.
P x _OUTCLK period
P x _OUTCLK high time
P x _OUTCLK low time
P x _OUTD[3:0], P x _OUTDV output valid from
rising edge of P x _OUTCLK
P x _OUTD[3:0], P x _OUTDV output hold from
rising edge of P x _OUTCLK
(output)
Table 14.11 MII Output Timing Values (PHY Mode)
DESCRIPTION
Figure 14.6 MII Output Timing (PHY Mode)
t
hold
DATASHEET
t
t
val
clkh
369
t
clkp
for additional details.
t
clkl
t
t
clkp
clkp
t
10.0
MIN
val
40
*0.4
*0.4
t
t
clkp
clkp
MAX
28.0
*0.6
*0.6
t
hold
UNITS
Revision 1.3 (08-27-09)
ns
ns
ns
ns
ns
t
val
Note 14.14
Note 14.14
NOTES

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