tda19978bhv NXP Semiconductors, tda19978bhv Datasheet - Page 15

• Manufacturer Part Number: tda19978bhv
• Description: Quad Hdmi 1.3a Receiver Interface With Equalizer Hdtv Up To 1080p, Up To Uxga For Pc Formats
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA19978B_1
Product data sheet
8.24.1 EDID memory shared over all four HDMI inputs
8.23 Power management
8.24 EDID memory management
The TDA19978B can use one of three Power-down modes:
The user can activate each mode with pin PD or using I
The TDA19978B embedded EDID memory can be shared with all HDMI inputs. The
embedded EDID memory shares 253 bytes with the four HDMI inputs. In addition, three
bytes are dedicated to the physical address and checksum for each HDMI input (see
Figure
EDID memory over zero, one, two, three or four HDMI input(s) as shown in
The content of embedded volatile EDID memory must be programmed using the I
for each power-on of TDA19978B. The embedded EDID memory remains accessible on
each HDMI input when the TDA19978B uses a different low-power mode.
The “physical address” of each HDMI input can be easily changed with the TDA19978B
without corrupting the integrity of each DDC-bus.
Fig 3.
•
•
•
•
•
•
level 0: full Power-down mode
level 1: internal EDID memory with I
level 2: internal EDID memory with I
enabled
level 0: PD pin is HIGH
level 1: settings defined in the I
level 2: settings defined in the I
(1) 253 bytes
3). This memory is accessible in parallel by all HDMI inputs. You can share the
+ 3 bytes input A
+ 3 bytes input B
+ 3 bytes input C
+ 3 bytes input D
+ 1 byte address pointer (subPhys@): this indicates the address in each block where the data for
inputs A, B, C and D will be copied.
An example of an application with EDID memory shared over all four HDMI inputs
INPUT
HDMI
3 B
Rev. 01 — 7 August 2008
INPUT
HDMI
3 B
TDA19978B
EDID: 253 B
2
2
C-bus registers
C-bus registers
INPUT
HDMI
3 B
Quad HDMI 1.3a receiver with digital processing
2
2
C-bus serial interface active
C-bus serial interface and activity detection
INPUT
HDMI
3 B
I
2
C-bus
2
C-bus registers:
EDID CONTENT
FLASH
CPU
TDA19978B
001aai417
(1)
© NXP B.V. 2008. All rights reserved.
Figure
2
4.
C-bus
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