tja1041a NXP Semiconductors, tja1041a Datasheet - Page 9
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tja1041a
Manufacturer Part Number
tja1041a
Description
High Speed Can Transceiver
Manufacturer
NXP Semiconductors
Datasheet
1.TJA1041A.pdf
(25 pages)
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NXP Semiconductors
TJA1041A_3
Product data sheet
7.2.5 Wake-up source flag
7.2.6 Bus failure flag
7.2.7 Local failure flag
7.3.1 TXD dominant clamping detection
7.3.2 RXD recessive clamping detection
7.3 Local failures
immediately available on pins ERR and RXD (provided that V
The flag is cleared at power-on, or when the UV
normal mode.
Wake-up source recognition is provided via the wake-up source flag, which is set when
the wake-up flag is set by a local wake-up request via pin WAKE. The wake-up source flag
can only be set after the pwon flag is cleared. In normal mode the wake-up source flag
can be made available on pin ERR. The flag is cleared at power-on or when the
transceiver leaves normal mode.
The bus failure flag is set if the transceiver detects a bus line short-circuit condition to
V
trying to drive the bus lines dominant. In normal mode the bus failure flag can be made
available on pin ERR. The flag is cleared when the transceiver re-enters normal mode.
In normal mode or pwon/listen-only mode the transceiver can recognize five different local
failures, and will combine them into one local failure flag. The five local failures are: TXD
dominant clamping, RXD recessive clamping, a TXD-to-RXD short circuit, bus dominant
clamping, and overtemperature. Nature and detection of these local failures is described
in
pin ERR. The flag is cleared when entering normal mode or when RXD is dominant while
TXD is recessive, provided that all local failures are resolved.
The TJA1041A can detect five different local failure conditions. Any of these failures will
set the local failure flag, and in most cases the transmitter of the transceiver will be
disabled. The following sections give the details.
A permanent LOW-level on pin TXD (due to a hardware or software application failure)
would drive the CAN bus into a permanent dominant state, blocking all network
communication. The TXD dominant time-out function prevents such a network lock-up by
disabling the transmitter of the transceiver if pin TXD remains at a LOW level for longer
than the TXD dominant time-out t
possible bit rate of 40 kbit/s. The transmitter remains disabled until the local failure flag is
cleared.
An RXD pin clamped to HIGH-level will prevent the controller connected to this pin from
recognizing a bus dominant state. So the controller can start messages at any time, which
is likely to disturb all bus communication. RXD recessive clamping detection prevents this
effect by disabling the transmitter when the bus is in dominant state without RXD reflecting
this. The transmitter remains disabled until the local failure flag is cleared.
BAT
Section
, V
CC
or GND during four consecutive dominant-recessive cycles on pin TXD, when
7.3. In pwon/listen-only mode the local failure flag can be made available on
Rev. 03 — 4 December 2007
dom(TXD)
. The t
dom(TXD)
NOM
flag is set or the transceiver enters
timer defines the minimum
High-speed CAN transceiver
I/O
and V
TJA1041A
CC
© NXP B.V. 2007. All rights reserved.
are present).
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