mic3003gfltr Micrel Semiconductor, mic3003gfltr Datasheet - Page 52

• Manufacturer Part Number: mic3003gfltr
• Description: Fom Management Ic With Internal Calibration
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
July 2010
Default Value
Serial Address
Byte Address
Default value for all four bytes
Serial address
Byte addresses
This four-byte field is for entry of the password required to access the OEM area of the MIC3003’s memory and registers. A
valid OEM password will also permit access to the user areas of memory. This field is compared to the four-byte OEMPWSET
field at serial address A6h, bytes 12 - 15 (0C h – 0F h ). If the two fields match, access is allowed to the OEM areas of the
MIC3003 non-volatile memory at serial addresses A4 h and A6 h . The OEM password is set by writing the new value into
OEMPWSET. The password comparison is performed following the write to the highest address byte of OEMPW, address 7B h
if OEMCFG5 bit 2 is low, or 7E h if OEMCFG5 bit 2 is high. This byte must be written last.
A four-byte burst-write sequence to OEMPW may be used as this will result in the highest address byte being written last.
OEMPW is reset to zero at power on. Any values written to OEMPW will be readable by the host regardless of the
locked/unlocked status of the device. If OEMPWSET is set to zero (00000000 h ), the MIC3003 will remain unlocked regardless
of the contents of the OEMPW field. This is the factory default security setting.
Byte
3
2
1
0
read/write
reserved
D[7-4]
D[7]
D[3]
D[2]
D[1]
D[0]
D[7]
Bit(s)
Weight
OEM Password Entry, Most Significant Byte (Address = 7Bh resp. 7Eh)
OEM Password Entry, 2nd Most Significant Byte (Address = 7Ah resp. 7Dh)
OEM Password Entry, 2nd Least Significant Byte (Address = 79h resp. 7Ch)
OEM Password Entry, Least Significant Byte (Address = 78h resp. 7Bh)
read/write
reserved
SRS1
PLOS
D[6]
D[6]
PLS
Function
Reserved
Soft rate select (RS1)
Reserved
Power Level Operation State
Power Level Select
read/write
reserved
D[5]
D[5]
Extended Control and Status (ECNTRL)
OEM Password Entry (OEMPW)
0000 0000 b = 00 h (reset to zero at power-on)
A2 h
If OEMCFG5-2 = 0: 120 – 123 = 78 h – 7B h
If OEMCFG5-2 = 1: 123 – 126 = 7B h – 7E h
read/write
reserved
D[4]
D[4]
read/write
read/write
52
SRS1
D[3]
D[3]
0000 0000 b = 00 h
118 = 76 h
read/write
Operation
Reserved—always read as zeros
Assert the TRSOUT pin in Rate
Select/Extended Rate Select Emulation
Mode
Reserved—always reads as zero
These two bits are read/write but change
no functionality of the MIC3003
reserved
A2 h
D[2]
D[2]
[e-mail]
read/write
read/write
PLOS
D[1]
D[1]
or [phone]
read/write
read/write
M9999-072910-A
MIC3003GFL
D[0]
PLS
D[0]