z87200 ZiLOG Semiconductor, z87200 Datasheet
z87200
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z87200 Summary of contents
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... Z87200 Spread-Spectrum Transceiver Product Specification PS010202-0601 ZiLOG Worldwide Headquarters • 910 E. Hamilton Avenue • Campbell, CA 95008 Telephone: 408.558.8500 • Fax: 408.558.8300 • www.ZiLOG.com ...
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... Z87200 Spread-Spectrum Transceiver This publication is subject to replacement by a later edition. To determine whether a later edition exists request copies of publications, contact: ZiLOG Worldwide Headquarters 910 E. Hamilton Avenue Campbell, CA 95008 Telephone: 408.558.8500 Fax: 408.558.8300 www.ZiLOG.com ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All other products and/or service names mentioned herein may be trademarks of the companies with which they are associated ...
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... Differentially encoded BPSK and QPSK are fully sup- ported. The receiver section can also handle differentially encoded pi/4 QPSK. A block diagram of the Z87200 is shown in Figure 1; its pin configuration is shown in Z87200 receive functions integrate the capabilities of a digital downconverter, PN matched filter, and DPSK demodula- tor, where the input signal is an analog-to-digital converted I ...
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... N of the PN code employed must b be such that the product Mchips/sec (for BPSK) or 22.528 Mchips/sec (for QPSK). For the 45 MHz Z87200, then code length of 11 im- /N bps. When C plies that the maximum data rate that can be supported in compliance with the processing gain requirements of FCC regulations is 2 ...
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... Z87200, with a pro- grammable loop filter provided to establish a frequency tracking loop. Burst and Continuous Data Modes The Z87200 is designed to operate in either burst or con- tinuous mode: in burst mode, built-in symbol counters al- low bursts 65,533 symbols to be automatically transmitted or received; in continuous mode, the data is simply treated as a burst of infinite length. The Z87200’ ...
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... Control NCO Register Frequency Power Discriminator Detector and Loop Filter Dot Cross Symbol Differential Tracking Demodulator Processor 2xChip Clock Symbol Clock Figure 1. Z87200 Block Diagram PS010202-0601 QPSK TXIFOUT 7-0 Modulator TXIOUT TXQOUT TXCHPPLS TXACQPLS SIN COS TXACTIVE RXACTIVE TXTEST RXTEST Rx PN Code ...
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... MNCOEN RXMABRT RXMDET VSS VDD 90 RXIIN0 RXIIN1 RXIIN2 RXIIN3 95 RXIIN4 RXIIN5 RXIIN6 RXIIN7 N/C 5 VSS 100 1 Figure 2. Z87200 100-Pin PQFP Pin Description Z87200 100-Pin QFP 10 15 Note: I.C. denotes Internal Connection. Do not use for PS010202-0601 Spread-Spectrum Transceiver ...
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... Z87200 Spread-Spectrum Transceiver PIN DESCRIPTION (Continued) Table 1. 100-Pin PQFP Pin Description No Symbol 1,11,31,40,51,6 V Power Supply DD 5,75,81,90 2 RXQIN0 Rx Q-Channel Input (Bit 0; LSB) 3 RXQIN1 Rx Q-Channel Input (Bit 1) 4 RXQIN2 Rx Q-Channel Input (Bit 2) 5 RXQIN3 Rx Q-Channel Input (Bit 3) 6 RXQIN4 Rx Q-Channel Input (Bit 4) 7 RXQIN5 ...
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... OL Voltage I Output Short Circuit OS Current C Input Capacitance C Output Capacitance OUT Notes: 1. The operational supply current depends on how the Z87200 is configured. Typical current consumption can be approximated as follows =5xf + mA, DD RXIFCLK CHIP 3. where f is the frequency of RXIFCLK and f RXIFCLK both in MHz. ...
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... Z87200 Spread-Spectrum Transceiver A.C. CHARACTERISTICS Operating Conditions 5.0V 5 Symbol Parameter t /CSEL, ADDR, DBUS to SU WRITE Setup t WRITE to CSEL, ADDR, HD DBUS Hold t WRITE Pulse Width W CSEL ADDR DON'T CARE 6-0 DATA DON'T CARE 6-0 WRITE 4 + Min Max VALID VALID ...
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... The TXACQPLS signal pulses high once each burst, transmission, during the last chip of the Acquisition/Preamble symbol. The falling edge corresponds to the end of this symbol period + Min Max Units 45.056 MHz 20.0 MHz PS010202-0601 Z87200 Spread-Spectrum Transceiver Conditions Z0200045FSC Z0200020FSC or if TXIFOUT is used . It is shown H 4-9 4 ...
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... Z87200 Spread-Spectrum Transceiver TXIFCLK TXCHPPLS TXBITPLS, TXTRKPLS, TXACQPLS DON'T CARE TXIN TXIOUT, TXQOUT TXIFOUT 4- VALID t CT Figure 4. Transmitter Input/Output Timing PS010202-0601 DON'T CARE Zilog ...
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... It is shown Figure 9, but can be set from The rising edge of /RXDRDY should be used to clock out the data (RXOUT, RXIOUT, or RXQOUT + Min Max. 45.056 20 PS010202-0601 Z87200 Spread-Spectrum Transceiver Units Conditions MHz Z8720045FSC MHz Z8720020FSC 4-11 4 ...
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... Z87200 Spread-Spectrum Transceiver A.C. CHARACTERISTICS RXIFCLK RXIIN, RXQIN RXSPLPLS RXSYMPLS /RXDRDY RXOUT, RXIOUT, RXQOUT 4- Figure 5. Receiver Input/Output PS010202-0601 Zilog t HD ...
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... AC CHARACTERISTICS Operating Conditions 5.0V 5 Symbol Parameter t /OEN low to RXTEST D1 t /OEN high to RXTEST D2 /OEN RXTEST 7 + Min active 11 7-0 tri-state 7 7-0 Tri-state Low Impedance State Figure 6. /OEN to RXTEST 7-0 Timing PS010202-0601 Z87200 Spread-Spectrum Transceiver Max Units ns ns Tri-state 4-13 4 ...
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... Differential Encoder Data to be transmitted is differentially encoded before be- ing spread by the transmit PN code. Differential encoding of the signal is fundamental to operation of the Z87200’s receiver: the Z87200’s DPSK Demodulator computes “Dot” and “Cross” product functions of the current and pre- vious symbols’ downconverted I and Q signal components in order to perform differential decoding as an intrinsic part of DPSK demodulation ...
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... Z87200 be used with an external BPSK/QPSK modulator. When the Z87200 is set to transmit in BPSK mode (by set- ting bit 0 of address 40 to both the I and Q channels of the modulator so that the modulated output signal occupies only the first and third ...
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... NCO should not be pro- grammed to be greater than 50% of RXIFCLK. As desired by the user, the output of the Z87200 receiver’s Loop Filter can then be added or subtracted to adjust the NCO’s fre- quency control word and create a closed-loop frequency tracking loop ...
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... Two power saving methods are used in the PN Matched Filter of the Z87200. As discussed previously, the first method allows power to be shut off in the unused taps of the PN Matched Filter when the filter length is configured to be less than 64 taps. The second method is a propri- ...
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... Z87200 Spread-Spectrum Transceiver FUNCTIONAL BLOCKS (Continued) Power Detector The complex output of the PN Matched Filter is fed into a Power Detector which, for every cycle of the internal base- band sampling clock, computes the magnitude of the vec- tor of the I and Q channel correlation sums (K)+Q (k), where the magnitude is approximated as Max{Abs(I),Abs(Q)} + 1/2 Min{Abs(I), Abs(Q)} ...
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... If desired, this function can be disabled by setting bit 3 of address 30 high. The Z87200 also includes a circuit to keep track of missed detects; that is, those cases where no peak power level ex- ceeds the set threshold. An excessively high rate of missed detects is an indication of poor signal quality and can be used to abort the reception of a burst of data ...
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... Z87200 Spread-Spectrum Transceiver FUNCTIONAL BLOCKS (Continued) a –45 signal rotation must be programmed to optimize the constellation boundaries in the comparison process be- tween successive symbols. Note also that introduction rotation introduces a scaling factor the sig- Figure 8. DPSK Demodulator I and Q Channel Processing Frequency Discriminator and Loop Filter ...
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... PN chip rates in the receiver, but must be at least two times greater than the baseband sample rate (or, equivalently, at least four times greater than the PN chip rate). Data on the pins is latched and processed by RXIFCLK. PS010202-0601 Spread-Spectrum Transceiver and 34 H (Pins 2-9) 4-21 Z87200 con ...
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... Z87200 Spread-Spectrum Transceiver FUNCTIONAL BLOCKS (Continued) Note that if the Z87200 used in Direct I.F. Sampling Mode, then the I.F. signal should be input to the RXIIN in- put port only. RXQIN must then be held to arithmetic zero according to the chosen ADC format as selected by bit 3 of address other words, to support Direct I.F. Sam- ...
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... TXIFCLK, which latches the TXIN value, and is generated repeatedly at the symbol rate as long as the input signal MTXEN remains high. In QPSK mode, data is requested by the Z87200 by a ris- ing edge of output signal TXBITPLS, where this signal is generated twice per symbol, first one chip period before the middle of the symbol and then one chip period before the end of the symbol ...
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... RXTEST the RXTEST function selected to be accessed. /RESET (Pin 16) Reset Bar. /RESET is the master reset of the Z87200, clearing the control registers as well as the contents within the receiver, transmitter, and NCO data paths when it is set low. Setting /RESET high enables operation of the cir- cuitry ...
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... QPSK mode, two data bits are provided per symbol with a half-symbol separation between the bits. Note that, when the Z87200 is operated in burst mode, the data will be in- valid during the first symbol of each burst; that is, in BPSK mode the first bit will be invalid, and in QPSK mode the first ...
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... Z87200 Spread-Spectrum Transceiver OUTPUT SIGNALS (Continued) pairs. Note that, when the Z87200 is operated in burst mode, the first bit of RXQOUT in each burst will be invalid. /RXDRDY (Pin 54) Receiver Data Ready Bar. /RXDRDY is provided as a re- ceiver timing signal. /RXDRDY is normally set high and pulses low during the baseband sampling clock cycle when a new RXOUT signal is generated ...
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... TXIFCLK speeds less than 20 MHz; output with clock speeds greater than 20 MHz will be indeterminate value Table 5. Transmitter Test Functions H ADDR 1 and the assign- 1-0 PS010202-0601 Z87200 Spread-Spectrum Transceiver TXTEST Description ISM Unspread I Symbol QSYM Unspread Q Symbol SCODE Spreading Code 4-27 4 ...
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... The loading of the NCO may be performed by various means. Setting this bit provides a synchronized internal means to control update of the NCO. Alternatively, the MFLD pin or the Z87200’s programmable loop filter timing circuitry may be used. The MFLD input and bit 0 of address 00 ORed together so that, when either one is held low, a rising edge on the other triggers the frequency load function manually ...
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... PN Matched Filter Registers Despreading of the received signal is accomplished in the Z87200 with a dual (I and Q channel) PN Matched Filter. Furthermore, the Z87200 is designed for burst signal oper- ation, where each data burst begins with an Acquisi- tion/Preamble symbol and is then followed by the actual in- formation data symbols ...
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... Bits 1,0 Power Estimator Registers Coeff. 60 Address 28 Bits 1-0 — Matched Filter Viewport Control Bits 1,0 The Z87200 incorporates viewport (data selector) circuitry Coeff select any eight consecutive bits from the 10-bit outputs - - - of the PN Matched Filter as the 8-bit inputs to the Power - - - Estimator and DPSK Demodulator blocks. The Symbol ...
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... PN Matched Filter outputs for the Acquisition/Preamble symbol and the data symbols that follow thereafter are treated in the Symbol Tracking Processor. Since operation of the Z87200 receiver pre- sumes symbol-synchronous PN modulation, processing of the PN Matched Filter outputs can be used for symbol syn- chronization prior to DPSK demodulation ...
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... Symbol Tracking Processor will not in- PS010202-0601 , the device will ter- H must range from where this value is the maximum num- H high This function H to monitor signal quality unless disabled When bit 1 is set low, the Z87200 will Zilog ...
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... Address Bit 0 — Receiver Manual Abort This bit enables the user to manually force the Z87200 to cease reception of the present burst of data symbols and prepare for acquisition of a new burst. This function can be used to reset the receiver and prepare to receive a priority ...
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... H low (0). Bit 3 — Loop Clear Disable The setting of this bit determines whether the Loop Filter’s K2 accumulator is reset or not when the Z87200 receiver function is turned off when the input signal MRXEN is set low. 4-34 When bit 3 is set low, the Loop Filter’s K2 accumulator will be reset to zero whenever MRXEN is set low to disable the receiver function ...
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... PS010202-0601 Spread-Spectrum Transceiver is set high, a value of 1/2 will shown in Table 16. Table 17. K1 Gain Values Gain in K1 Path ••••• ••••• 4-35 Z87200 where ...
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... Bit 0 — NCO Enable The function of this bit is to allow the power consumed by the operation of the NCO circuitry to be minimized when the Z87200 is not receiving. The NCO can also be disabled while the Z87200 is transmitting provided that the Z87200’s on-chip BPSK/QPSK modulator is not being used ...
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... Note that the range is slightly different from that in and the transmitter. Once the number of received data symbols H processed exceeds this number, the burst is assumed to 7-0 have ended and the Z87200 immediately returns to acqui- sition mode to await the next burst. PS010202-0601 Spread-Spectrum Transceiver allows the un shown in Table 19 ...
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... TXIFCLK, which latches the TXIN value, and is generat- ed repeatedly at the symbol rate as long as the input signal MTXEN remains high. In QPSK mode, data is requested by the Z87200 by a ris- ing edge of output signal TXBITPLS, where this signal is generated in this mode twice per symbol, first one chip pe- riod before the middle of the symbol and then one chip pe- riod before the end of the symbol ...
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... The last chip trans- mitted per symbol is then code chip 0. Note that this con- vention agrees with that used for the Z87200’s PN Matched Filter: for a code of length N, code chip (N-1) will be the first chip transmitted and will first be processed by Tap 0 of the PN Matched Filter ...
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... If the data value is set to 0000 , then the symbols per burst counter is disabled, per- H mitting the Z87200 to be used for continuous transmission of data. PS010202-0601 Zilog Overlay Code Length and Polynomial ...
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... FEP Disable MF Viewport Control Force Manual Man. Det. Cont. Punctual Enable Acquis. Man. Det. Man. Abort Signal Rotation Control K2 Gain Value K2 Gain Value Inv. O/p BPSK En. Rev. I & Q Rx. En. Tx. En. NCO En. RXTEST7-0 Function Select MF Lpbk En TX BPSK Unused (0) Transmitter Overlay Select 4-41 Z87200 4 ...
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... SA Figure 11. Spectra of Signals in Direct I.F. Sampling Mode 4-42 The trade-off, however the lower maximum PN chip rate that can be supported by the Z87200 in Direct I.F. Sampling Mode as compared to the maximum rate that can be supported by Quadrature Sampling Mode. In Direct I.F. Sampling Mode, the sampled signal is pre- sented as input to the receiver’s I channel input (RXIIN) and the Q channel input (RXQIN) is held to zero (where “ ...
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... NCO output. When the input sampled signal of line 3 is then modulated with the com- plex signal of the Z87200’s quadrature NCO of line 4, the signal spectrum after mixing is as shown in line 5. The sec- tions shown inside the shaded areas are the aliases of the baseband signal beyond the Nyquist frequency and are not of concern ...
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... N, so that the output sampling rate is (1/N)th of the input sampling rate and the I.F. sampling rate fSA is decimated to the baseband sampling rate. Since the Z87200’s PN Matched Filter requires two samples per chip, the baseband sampling rate must be at twice the PN chip rate and N must equal f /B ...
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... Further analysis shows that if the input SNR is 15 dB, then the alias attenuated will reduce the SNR by approximately 1 dB. PS010202-0601 Z87200 Spread-Spectrum Transceiver SA /B=4, the break frequency greater than 3/2. Here, the attenua- ...
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... Using the Z87200 with Two ADCs in Quadra- ture Sampling Mode Quadrature Sampling Mode requires that quadrature I and Q channel I.F. inputs are sampled by two ADCs and input to the Z87200’s Downconverter. All four multipliers of the Downconverter’s complex multiplier are then used to per- SA form true single sideband downconversion to baseband. ...
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... Dot(k) if the amplitude of the signal is constant for consecutive symbols and if the phase rotation Ø bols is small. The Z87200 DPSK Demodulator can thus use the sign of the Dot product in order to make DBPSK symbol decisions without the introduction of any fixed ] fixed * phase rotation ...
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... Dot and Cross products is desired in order shift the possible phase differences 135 , 225 , or 315 so that the DQPSK decision boundaries coincide with the signs of the Dot and Cross products. In the Z87200 DPSK demodulator, phase rotation is accomplished in the signal rotation block by the following transformation of the I and ...
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... IF frequency, thereby eliminating the need for an external modulator. Because sampled data system like the Downconvert the Z87200, however, care must be taken to ensure that the results of aliasing do not adversely affect the out- put transmit signal. ...
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... OUT RXIFCLK/2 In particular, the Z87200’s PN modulation results in a transmit signal that has a power spectral density charac- terizable as a sinc function (sin(x)/x) centered about the I.F. frequency f . Nulls of the sinc function occur at inte- OUT ger multiples of the PN chip rate, and the null-to-null signal bandwidth of the Z87200’ ...
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... PS010202-0601 Z87200 Spread-Spectrum Transceiver , and now the fourth and fifth side- RXIFCLK RXIFCLK RXIFCLK ...
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... Z87200 Spread-Spectrum Transceiver THEORY OF OPERATION (Continued) In both of the cases shown above, and especially the sec- ond, the level of the distortion is low enough so that the performance penalty would not be very great. And, of course spread-spectrum system the effective distor- tion is reduced by the processing gain realized in de- spreading the signal at the receiver ...
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... As a rule-of-thumb, one may restrict the I.F. frequency to 25% of the clock frequency, but, in general, each appli- cation and combination of PN chip rate, I.F. frequency, and TXIFCLK/RXIFCLK frequency is unique and should be evaluated before deciding whether to use the Z87200’s in- ternal BPSK/QPSK modulator. RXIFCLK PS010202-0601 ...