z87200 ZiLOG Semiconductor, z87200 Datasheet - Page 8

• Manufacturer Part Number: z87200
• Description: Spread-spectrum Transceiver
• Manufacturer: ZiLOG Semiconductor

PIN DESCRIPTION (Continued)
Z87200
Spread-Spectrum Transceiver
1,11,31,40,51,6
5,75,81,90
2
3
4
5
6
7
8
9
10
12
13,15,30,39,50,
64,74,80,89
14
16
17
18
19
20
21
22
23
24
25
26
27
28
29
32
33
34
35
36
37
38
41
42
43
44
45
46
47
48
49
52
53
4-6
No
Table 1. 100-Pin PQFP Pin Description
V
RXQIN0
RXQIN1
RXQIN2
RXQIN3
RXQIN4
RXQIN5
RXQIN6
RXQIN7
RXXE
RXIFCLK
V
TXIFCLK
/RESET
MTXE
TXIN
TXMCHP
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
/WR
/CSEL
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
RXTEST7
RXTEST6
RXTEST5
RXTEST4
RXTEST3
RXTEST2
RXTEST1
RXTEST0
/OEN
RXSYMPLS Receiver Symbol Pulse
RXSPLPLS
DD
SS
Symbol
Power Supply
Rx Q-Channel Input
(Bit 0; LSB)
Rx Q-Channel Input (Bit 1)
Rx Q-Channel Input (Bit 2)
Rx Q-Channel Input (Bit 3)
Rx Q-Channel Input (Bit 4)
Rx Q-Channel Input (Bit 5)
Rx Q-Channel Input (Bit 6)
Rx Q-Channel Input
(Bit 7; MSB)
Manual Receiver Enable
Receiver I.F. Clock
Ground
Transmitter I.F. Clock
/Reset
Manual Transmitter Enable
Transmitter Input
Transmitter Manual Chip Pulse
Data Bus (Bit 0; LSB)
Data Bus (Bit 1)
Data Bus (Bit 2)
Data Bus (Bit 3)
Data Bus (Bit 4)
Data Bus (Bit 5)
Data Bus (Bit 6)
Data Bus (Bit 7; MSB)
Write Bar
Chip Select Bar
Address Bus (Bit 0; LSB)
Address Bus (Bit 1)
Address Bus (Bit 2)
Address Bus (Bit 3)
Address Bus (Bit 4)
Address Bus (Bit 5)
Address Bus (Bit 6; MSB)
Receiver Test Output (Bit 7)
Receiver Test Output (Bit 6)
Receiver Test Output (Bit 5)
Receiver Test Output (Bit 4)
Receiver Test Output (Bit 3)
Receiver Test Output (Bit 2)
Receiver Test Output (Bit 1)
Receiver Test Output (Bit 0)
Output Enable Bar
Receiver Sample Pulse
Function
PS010202-0601
54
55
56
57
58
59
60
61
62
63
66
67
68
69
70
71
72
73
76
77
78
79,82
83
84
85
86
87
88
91
92
93
94
95
96
97
98
99
100
Note: I.C. denotes Internal Connection. Do not use for vias.
No
Table 1. 100-Pin PQFP Pin Description
/RXDRDY
RXQOUT
RXIOUT
RXOUT
I.C.
TXTEST
TXACQPLS Transmitter Acquisition Pulse
TXTRKPLS
TXCHPPLS
TXBITPLS
TXIFOUT7
TXIFOUT6
TXIFOUT5
TXIFOUT4
TXIFOUT3
TXIFOUT2
TXIFOUT1
TXIFOUT0
TXQOUT
TXIOUT
TXACTIVE
N.C.
RXACTIVE
RXMSMPL
MFLD
MNCOEN
RXMABRT
RXMDET
RXIIN0
RXIIN1
RXIIN2
RXIIN3
RXIIN4
RXIIN5
RXIIN6
RXIIN7
N.C.
V
SS
Symbol
Receiver Data Ready Bar
Receiver Q Channel Output
Receiver I Channel Output
Receiver Output
[Note]
Transmitter Test Output
Transmitter Data Track Pulse
Transmitter Chip Pulse
Transmitter Bit Pulse
Tx I.F. Output (Bit 7, MSB)
Tx I.F. Output (Bit 6)
Tx I.F. Output (Bit 5)
Tx I.F. Output (Bit 4)
Tx I.F. Output (Bit 3)
Tx I.F. Output (Bit 2)
Tx I.F. Output (Bit 1)
Tx I.F. Output (Bit 0, LSB)
Tx Q-Channel Output
Tx I-Channel Output
Transmitter Active
No Connection
Receiver Active
Receiver Manual Sample Clock
Manual Frequency Load
Manual NCO Enable
Receiver Manual Abort
Receiver Manual Detect
Rx I-Channel Input
(Bit 0; LSB)
Rx I-Channel Input (Bit 1)
Rx I-Channel Input (Bit 2)
Rx I-Channel Input (Bit 3)
Rx I-Channel Input (Bit 4)
Rx I-Channel Input (Bit 5)
Rx I-Channel Input (Bit 6)
Rx I-Channel Input (
Bit 7; MSB)
No Connection
Ground
Function
Zilog