sta335bwqs STMicroelectronics, sta335bwqs Datasheet - Page 62

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sta335bwqs

Manufacturer Part Number
sta335bwqs
Description
2.1-channel High-efficiency Digital Audio System With Qsound Qhd?
Manufacturer
STMicroelectronics
Datasheet
Register description
7.13
7.14
7.15
62/72
Variable max power correction registers (addr 0x27 to 0x28)
MPCC bits determine the 16 MSBs of the MPC compensation coefficient. This coefficient is
used in place of the default coefficient when MPCV = 1.
Variable distortion compensation registers (addr 0x29 to
0x2A)
DCC bits determine the 16 MSBs of the distortion compensation coefficient. This coefficient
is used in place of the default coefficient when DCCV = 1.
Fault detect recovery constant registers (addr 0x2B to 0x2C)
FDRC bits specify the 16-bit fault detect recovery time delay. When FAULT is asserted, the
3-STATE output is immediately asserted low and held low for the time period specified by
this constant. A constant value of 0x0001 in this register is approximately 0.083 ms. The
default value of 0x000C specifies approximately 0.1 ms.
MPCC15
FDRC15
MPCC7
DCC15
FDRC7
DCC7
D7
D7
D7
D7
D7
D7
0
1
1
0
0
0
MPCC14
FDRC14
MPCC6
DCC14
FDRC6
DCC6
D6
D6
D6
D6
D6
D6
0
1
1
0
0
0
MPCC13
FDRC13
MPCC5
DCC13
FDRC5
DCC5
D5
D5
D5
D5
D5
D5
0
0
1
1
0
0
MPCC12
FDRC12
MPCC4
DCC12
FDRC4
DCC4
D4
D4
D4
D4
D4
D4
1
0
1
1
0
0
MPCC11
FDRC11
MPCC3
DCC11
FDRC3
DCC3
D3
D3
D3
D3
D3
D3
1
0
0
0
0
1
MPCC10
FDRC10
MPCC2
DCC10
FDRC2
DCC2
D2
D2
D2
D2
D2
D2
0
0
0
0
0
1
MPCC9
MPCC1
FDRC9
FDRC1
DCC9
DCC1
D1
D1
D1
D1
D1
D1
1
0
1
1
0
0
STA335BWQS
MPCC8
MPCC0
FDRC8
FDRC0
DCC8
DCC0
D0
D0
D0
D0
D0
D0
0
0
1
1
0
0

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