sta381bw STMicroelectronics, sta381bw Datasheet - Page 40

• Manufacturer Part Number: sta381bw
• Description: Sound Terminal 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

I
5.3
5.3.1
5.3.2
5.4
5.4.1
5.4.2
5.4.3
5.4.4
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2
C bus specification
the 9th bit time. The byte following the device identification byte is the internal space
address.
Write operation
Following the START condition, the master sends a device select code with the RW bit set
to 0. The STA381BW acknowledges this and then waits for the byte of the internal address.
After receiving the internal byte address the STA381BW again responds with an
acknowledgement.
Byte write
In the byte write mode the master sends one data byte which is acknowledged by the
STA381BW. The master then terminates the transfer by generating a STOP condition.
Multi-byte write
The multi-byte write mode can start from any internal address. The master generating a
STOP condition terminates the transfer.
Read operation
Current address byte read
Following the START condition, the master sends a device select code with the RW bit set
to 1. The STA381BW acknowledges this and then responds by sending one byte of data.
The master then terminates the transfer by generating a STOP condition.
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA381BW. The master acknowledges each
data byte read and then generates a STOP condition terminating the transfer.
Random address byte read
Following the START condition, the master sends a device select code with the RW bit set
to 0. The STA381BW acknowledges this and then the master writes the internal address
byte. After receiving the internal byte address, the STA381BW again responds with an
acknowledgement. The master then initiates another START condition and sends the device
select code with the RW bit set to 1. The STA381BW acknowledges this and then responds
by sending one byte of data. The master then terminates the transfer by generating a STOP
condition.
Random address multi-byte read
The multi-byte read mode can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA381BW. The master acknowledges each
data byte read and then generates a STOP condition, terminating the transfer.
Doc ID 018835 Rev 2
STA381BW