qt60326 Quantum Research Group, qt60326 Datasheet - Page 16

• Manufacturer Part Number: qt60326
• Description: 32 & 48 Key Qmatrix Ics
• Manufacturer: Quantum Research Group

This command requires substantial amounts of time to process
and return a result; it is not recommended to use this command
except perhaps on startup or very infrequently.
Command response timing: The response to this command
can take as long as 20ms.
No CRC is appended to the response.
4.15 Return Last Command - 0x0f
This command returns the last received command character, in
1’s complement (inverted). If the command is repeated twice or
more, it will return the inversion of 0x0f, 0xf0.
If a prior command was not valid or was corrupted, it will return
the bad command as well. This command also will reset the
communications error flag (Section 4.5).
No CRC is appended to the response.
4.16 Internal Code - 0x10
This command returns an internal code, as a value from 0..255.
A CRC byte is appended to the response; this CRC folds in the
command 0x10 itself initially.
4.17 Internal Code - 0x11
This command returns an internal code word (3 bytes) of the
part for factory diagnostic purposes.
A CRC byte is appended to the response; this CRC folds in the
command 0x11 itself initially.
4.18 Internal Code - 0x12
This command returns an internal code word (2 bytes) of the
part for factory diagnostic purposes.
No CRC is appended to the response.
4.19 Sleep - 0x16
The command must be repeated 2x within 100ms or the
command will fail. After the 2nd 0x16 from the host, the device
will reply with the character 0xE9, then sleep. On wake from
Sleep, the device will issue a 0x01 character back to the host.
Communications response timing: Responses to this
command may take from a few microseconds up to 5ms,
depending on what the device was doing at the moment the
command arrived.
After the response, the device will enter low power sleep mode
until awakened by a >10µs low level on the WS pin. When it
wakes, it will resume current operation in the state from which it
exited and attempt to send a 0x01 code back to the host to
signal that it is ready to communicate again.
During Sleep the DRDY pin is held low, and released once the
device awakes and is ready to return the 0x01 code.
The WS pin can be connected to Rx or /SS to provide a ‘free’
wakeup connection from the host controller. In SPI mode with
/SS tied to WS, a /SS toggle (any low pulse of at least 10µs)
under software control from the host controller without an actual
SPI transmission will wake the device.
In UART mode, with Rx tied to WS a 0xFF byte should be sent
to provide a pulse on WS. The start bit of the 0xFF forms a
convenient, narrow wake pulse without being long enough to be
interpreted as a byte during the wake operation.
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A recommended method to reestablish communications after
Wake from Sleep is to send the QT device a 0x0F ('Last
Command' command) repeatedly until the correct response
comes back (the command's own compliment, i.e. 0xF0).
If Sync mode is also enabled, the part will assume the wakeup
pulse is also a sync signal, and resume scanning starting with
Key 0 (which is not necessarily where it left off scanning when it
went to sleep).
WS Note: The device checks the WS pin and waits for it to
return high before the part actually begins sleep. There is a
timeout limit on this wait of ~2s; if the WS pin has not gone high
after this time, the part will reset itself.
4.20 Data Set for One Key - 0x4k
Returns the data set for key k, where k = {0..47} To form this
command, the key number is logical-OR’d into the byte 0x40.
This command returns 5 bytes, in the sequence:
Signal and Reference are returned LSByte first.
No CRC is appended.
4.21 Status for Key ‘k’ - 0x8k
Returns a bitfield for key ‘k’ where k is from {0..47}. The bitfield
indicates as follows:
Bit 2 - LSL notes: See page 23.
A CRC byte is appended to the response; this CRC folds in the
command 0x8k itself initially.
4.22 Cal Key ‘k’ - 0xck
This command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command.
This command functions the same as 0x03 CAL command
except this command only affects one key ‘k’ where ‘k’ is from 0
to 47.
The chosen key ‘k’ is recalibrated in its native timeslot; normal
running of the part is not interrupted and all other keys operate
correctly throughout. This command is for use only during
normal operation to try to recover a single key that has failed or
is not calibrated correctly.
Returns the 1’s compliment of 0xck just before the key is
recalibrated.
4.23 Command Sequencing
To interface the device with a host, the flow diagram of Figure
4-1, page 17, is suggested. The actual settings of the Setups
block used should normally just be the default settings except
Signal (2 bytes)
Reference (2 bytes)
Normal Detect Integrator (1 byte)
BIT
7
6
5
4
3
2
1
0
Description
1= reserved
1= reserved
1= reserved
1= key is enabled
1= key is in detect
1= signal ref < LSL (low signal error)
1= key is undergoing calibration
1= cal on this key failed 5 times
QT60486-AS R8.01/0105