qt60326 Quantum Research Group, qt60326 Datasheet - Page 3

• Manufacturer Part Number: qt60326
• Description: 32 & 48 Key Qmatrix Ics
• Manufacturer: Quantum Research Group

1 Overview
QMatrix devices are digital burst mode charge-transfer (QT)
sensors designed specifically for matrix geometry touch
controls; they include all signal processing functions necessary
to provide stable sensing under a wide variety of changing
conditions. Only a few external parts are required for operation.
The entire circuit can be built within a few square centimeters of
single-sided PCB area. CEM-1 and FR1 punched, single-sided
materials can be used for possible lowest cost. The PCB’s rear
can be mounted flush on the back of a glass or plastic panel
using a conventional adhesive, such as 3M VHB 2-sided
adhesive acrylic film.
QMatrix parts employ transverse charge-transfer ('QT') sensing,
a technology that senses changes in electrical charge forced
across an electrode by a pulse edge (Figure 1-1).
QMatrix devices allow for a wide range of key sizes and shapes
to be mixed together in a single touch panel. The approximate
design rules for these keys can be seen in Figure 2-6.
The actual internal pattern style is not as important as is the
need to achieve regular X and Y widths and spacings of
sufficient size to cover the desired graphical key area or a little
bit more; 2mm overhand is acceptable in most cases, since the
fields drop off near the edges anyway. The overall key size can
range from 10mm x 10mm up to 100mm x 100mm. The keys
can be any shape including round, rectangular, square, etc.
The internal pattern can be as simple as a single bar of Y or as
complex as the interleaved structure shown in Figure 2-6.
For better surface moisture suppression, the outer perimeter of
X should be as wide as possible, and there should be no
ground planes near the keys. The variable ‘T’ in this drawing
represents the total thickness of all materials that the keys must
penetrate.
A picture of an actual board made using similar key geometries
is shown on page 30.
The devices use both UART and SPI interfaces to allow key
data to be extracted and to permit individual key parameter
setup. The interface protocol uses simple single byte
commands and responds with single byte responses in most
cases. The command structure is designed to minimize the
amount of data traffic while maximizing the amount of
information conveyed.
In addition to normal operating and setup functions the device
can also report back actual signal strengths and error codes.
)
Figure 1-1 Field flow between X and Y elements
driver
cmos
element
X
overlying panel
element
Y
3
QmBtn software for the PC can be used to program the
operation of the IC as well as read back key status and signal
levels in real time.
The parts are electrically identical with the exception of the
number of keys which may be sensed.
1.1 Part differences
Versions of the device are capable of a maximum of 32 or 48
keys (QT60326, QT60486 respectively).
These devices are identical in all respects, except that each is
capable of only the number of keys specified. These keys can
be located anywhere within the electrical grid of 8 X and 6 Y
scan lines.
Unused keys are always pared from the burst sequence in
order to optimize speed. Similarly, in a given part a lesser
number of enabled keys will cause any unused acquisition burst
timeslots to be pared from the sampling sequence to optimize
acquire speed. Thus, if only 40 keys are actually enabled, only
40 timeslots are used for scanning.
1.2 Enabling / Disabling Keys
The NDIL parameter is used to enable and disable keys in the
matrix. Setting NDIL = 0 for a key disables it (Section 5.4). At
no time can the number of enabled keys exceed the maximum
specified for the device in the case of the QT60326.
On the QT60326, only the first 4 Y lines (Y0..Y3) are
operational by default. On the QT60326, to use keys located on
lines Y4 and Y5, one or more of the pre-enabled keys must be
disabled simultaneously while enabling the desired new keys.
This can be done in one Setups block load operation.
2 Hardware & Functional
2.1 Matrix Scan Sequence
The circuit operates by scanning each key sequentially, key by
key. Key scanning begins with location X=0 / Y=0 (key #0). X
axis keys are known as rows while Y axis keys are referred to
as columns. Keys are scanned sequentially by row, for example
the sequence X0Y0 X1Y0 .... X7Y0, X0Y1, X1Y1... etc. Keys are
also numbered from 0..47. Key 0 is located at X0Y0. A table of
key numbering is located on page 25.
Each key is sampled in a burst of acquisition pulses whose
length is determined by the Setups parameter BL (page 22),
which can be set on a per-key basis. A burst is completed
entirely before the next key is sampled; at the end of each burst
the resulting signal is converted to digital form and processed.
The burst length directly impacts key gain; each key can have a
unique burst length in order to allow tailoring of key sensitivity
on a key by key basis.
2.2 Burst Paring
Keys that are disabled by setting NDIL =0 (page 21) have their
bursts pared from the scan sequence to save time. This has the
consequence of affecting the scan rate of the entire matrix as
well as the time required for initial matrix calibration. It does not
affect the time required to calibrate an individual key once the
matrix is initially calibrated after power-up or reset.
QT60486-AS R8.01/0105