aduc7033bstz-8l-rl Analog Devices, Inc., aduc7033bstz-8l-rl Datasheet - Page 24
aduc7033bstz-8l-rl
Manufacturer Part Number
aduc7033bstz-8l-rl
Description
Integrated Precision Battery Sensor For Automotive
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7033BSTZ-8L-RL.pdf
(136 pages)
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ADuC7033
Remap Operation
When a reset occurs on the ADuC7033, execution starts
automatically in the factory programmed internal configuration
code. This so-called kernel is hidden and cannot be accessed by
user code. If the ADuC7033 is in normal mode, it executes the
power-on configuration routine of the kernel and then jumps to
the reset vector, Address 0x00000000, to execute the user’s reset
exception routine. Because the Flash/EE memory is mirrored at
the bottom of the memory array at reset, the reset routine must
always be written in Flash/EE memory.
The remap command must be executed from the absolute
Flash/EE memory address, and not from the mirrored,
remapped segment of memory because this may be replaced by
SRAM. If a remap operation is executed while operating code
from the mirrored location, prefetch/data aborts can occur or
the user can observe abnormal program operation.
Any kind of reset logically remaps the Flash/EE memory to the
bottom of the memory array.
Rev. 0 | Page 24 of 136
SYSMAP0 Register
Name:
Address:
Default Value:
Access:
Function:
Table 10. SYSMAP0 MMR Bit Designations
Bit
7 to 1
0
SYSMAP0
0xFFFF0220
Updated by the kernel
Read/write access
This 8-bit register allows user code to remap
either RAM or Flash/EE memory space into
the bottom of the ARM memory space starting
at Address 0x00000000.
Description
Reserved. These bits are reserved and should
be written as 0 by user code.
Remap Bit.
Set by the user to remap the SRAM to
0x00000000.
Cleared automatically after reset to remap
the Flash/EE memory to 0x00000000.
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