lm25066apsqx National Semiconductor Corporation, lm25066apsqx Datasheet

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lm25066apsqx

Manufacturer Part Number
lm25066apsqx
Description
Lm25066a System Power Management And Protection Ic With Pmbus
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2011 National Semiconductor Corporation
System Power Management and Protection IC with
PMBus ™
General Description
The LM25066A combines a high performance hot-swap con-
troller with a PMBus ™ compliant SMBus/I
curately measure, protect and control the electrical operating
conditions of computing and storage blades connected to a
backplane power bus. The LM25066A continuously supplies
real-time power, voltage, current, temperature and fault data
to the system management host via the SMBus interface.
The LM25066A control block includes a unique hot-swap ar-
chitecture that provides current and power limiting to protect
sensitive circuitry during insertion of boards into a live system
backplane, or any other "hot" power source. A fast acting cir-
cuit breaker prevents damage in the event of a short circuit
on the output. The input under-voltage and over-voltage lev-
els and hysteresis are configurable, as well as the insertion
delay time and fault detection time. A temperature monitoring
block on the LM25066A interfaces with a low-cost external
diode for monitoring the temperature of the external MOSFET
or other thermally sensitive components. The POWER GOOD
output provides a fast indicator when the input and/or output
voltages are outside their programmed range. LM25066A
current measurement accuracy is ±1% over the temperature
range.
The LM25066A monitoring block computes both the real-time
and average values of subsystem operating parameters
(V
averaging is accomplished by averaging the product of the
input voltage and current. A black box (Telemetry/Fault Snap-
shot) function captures and stores telemetry data and device
status in the event of a warning or a fault.
Features
IN
Input voltage range: +2.9V to +17V
I
structure
, I
2
C/SMBus interface and PMBus compliant command
IN
, P
IN
, V
OUT
) as well as the peak power. Accurate power
301460
2
C interface to ac-
LM25066A
Applications
Package
24-Lead LLP Package
Programmable 25mV or 46mV Current Limit Threshold
with Power Limiting (MOSFET Power Dissipation Limiting)
Configurable Circuit Breaker protection for hard shorts
Configurable Under-Voltage and Over-Voltage protection
with hysteresis
Remote temperature sensing with programmable warning
and shutdown thresholds
Detection and notification of damaged MOSFET condition
Real time monitoring of V
resolution and 1 kHz sampling rate
Current measurement accuracy: ±1% over temperature
Power measurement accuracy: ±2% over temperature
True Input Power accurately averages dynamic power
readings
Averaging of V
interval ranging from 0.001 to 4 seconds
Programmable WARN and FAULT thresholds with
SMBALERT notification
Black box capture of telemetry measurements and device
status triggered by WARN or FAULT condition
Full featured application design and development
software
Server Backplane Systems
Base Station Power Distribution Systems
Solid State Circuit Breaker
IN
, I
IN
, P
IN
, and V
IN
, V
OUT
OUT
, I
IN
over programmable
, P
IN
January 13, 2011
, V
www.national.com
AUX
with 12 bit

Related parts for lm25066apsqx

lm25066apsqx Summary of contents

Page 1

... Input voltage range: +2.9V to +17V ■ C/SMBus interface and PMBus compliant command structure © 2011 National Semiconductor Corporation LM25066A ■ Programmable 25mV or 46mV Current Limit Threshold with Power Limiting (MOSFET Power Dissipation Limiting) ■ Configurable Circuit Breaker protection for hard shorts ...

Page 2

Typical Application Schematic Connection Diagram Solder exposed pad to ground. www.national.com Top View LLP-24 2 30146011 30146002 ...

Page 3

... Ordering Information Order Number LM25066APSQ LM25066APSQE LM25066APSQX Pin Descriptions Pin Name Description No. Pad Exposed Exposed pad of LLP Pad package. 1 ADR2 SMBUS address line 2 2 ADR1 SMBUS address line 1 3 ADR0 SMBUS address line 0 4 VDD Internal sub-regulator output 5 CL Current limit range ...

Page 4

Pin Name Description No. 22 VREF Internal Reference 23 DIODE External diode 24 VAUX Auxiliary voltage input www.national.com Applications Information Internally generated precision 2.73V reference used for analog to digital conversion. Connect a 1 µF capacitor on this pin to ...

Page 5

Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN, GATE, FB, UVLO/EN, OVLO, SENSE, PGD to GND (Note 6) SCL, SDA, SMBA, CL, CB, ADR0, ADR1, ADR2, ...

Page 6

Symbol Parameter Gate Control (GATE Pin) I Source current GATE Fault Sink current POR Circuit Breaker sink current V Gate output voltage in normal operation GATE voltage with respect to ground GATE OUT Pin I OUT bias current, enabled OUT-EN ...

Page 7

Symbol Parameter Telemetry Accuracy IIN Current input full scale range FSR IIN Current input LSB LSB VAUX VAUX input full scale range FSR VAUX VAUX input LSB LSB VIN Input voltage full scale range FSR VIN Input voltage LSB LSB ...

Page 8

Typical Performance Characteristics T = 25° 12V. All graphs show juction temperature Pin Current IN 6.0 5.5 5.0 4.5 4.0 3.5 3.0 -40 - 100 120 140 TEMPERATURE (°C) Sense ...

Page 9

Gate Pin Source Current VIN = 5V TO 17V VIN = 2. -40 - 100 120 140 TEMPERATURE (°C) PGD Low Voltage ...

Page 10

OVLO Threshold 1.167 VIN = 2.9V 1.166 VIN = 12V 1.165 1.164 1.163 VIN = 17V 1.162 -60 -40 - 100120140 TEMPERATURE (°C) FB Pin Hysteresis -23.0 -23.5 -24.0 -24.5 -25.0 -25.5 -26.0 -60 -40 ...

Page 11

Reference Voltage 2.75 2.74 2.73 2.72 2.71 2.70 -60 -40 - 100120140 TEMPERATURE (°C) Startup (Short circuit V ) OUT 30146092 Startup (UVLO, OVLO) 30146094 Startup (Insertion Delay) 30146090 Startup (5A Load) Startup (PGOOD) 11 ...

Page 12

Current Limit Event (CL = GND) Retry Event (Retry = GND) IIN Measurement Accuracy (VIN - SENSE = 25 mV) 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 - ...

Page 13

Block Diagram Functional Description The inline protection functionality of the LM25066A is de- signed to control the in-rush current to the load upon insertion of a circuit card into a live backplane or other “hot” power source, thereby limiting the ...

Page 14

Power Up Sequence The VIN operating range of the LM25066A is +2.9V to +17V, with a transient capability to +20V. Referring to Figure 2, as the voltage at VIN initially increases, the external N-channel MOSFET ( held off ...

Page 15

FIGURE 2. Power Up Sequence (Current Limit Only) Gate Control A charge pump provides the voltage at the GATE pin to en- hance the N-Channel MOSFET’s gate. During normal oper- ating conditions (t in Figure 2) the gate of Q ...

Page 16

STATUS_INPUT (7Ch), and DIAGNOSTIC_WORD (E1h) registers will be toggled high and SMBA pin will be pulled low unless this feature is disabled using the ALERT_MASK (D8h) register. For proper operation, the R no higher than 200 mΩ. Higher values may ...

Page 17

Under-Voltage Lock-Out (UVLO) The series pass MOSFET ( enabled when the input 1 supply voltage ( within the operating range defined by SYS the programmable under-voltage lockout (UVLO) and over- voltage lock-out (OVLO) levels. Typically the ...

Page 18

The PGD output is forced low when ei- ther the UVLO/EN pin is below its threshold or the OVLO pin is above its threshold. The status of the PGD pin can be read via the PMBus interface in ...

Page 19

Application Section DESIGN-IN PROCEDURE (Refer to Figure 6 for Typical Application Circuit) Shown here is the step-by-step procedure for hardware design of the LM25066A. This procedure refers to section numbers that provide detailed information on the following design steps. The ...

Page 20

R should be sufficiently low that the power dissipation DS(on) at maximum load current ( L(max) junction temperature above the manufacturer’s recommen- dation. - The gate-to-source voltage provided by the LM25066A can be as high as ...

Page 21

I is the current and Q1. For example, if the power limit is set at 20W with R mΩ, and V = 15V the sense resistor voltage calculates to DS 13.3 mV, ...

Page 22

TIMER CAPACITOR The TIMER pin capacitor (C ) sets the timing for the insertion T time delay, fault timeout period, and the restart timing of the LM25066A. A) Insertion Delay - Upon applying the system voltage (V ) ...

Page 23

FIGURE 10. UVLO and OVLO Thresholds Set By R1-R3 The procedure to calculate the resistor values is as follows: - Choose the upper UVLO threshold (V UVLO threshold (V ). UVL - Choose the upper OVLO threshold (V - The ...

Page 24

The four resistor values are calculated as follows: - Choose the upper and lower UVLO thresholds (V - Choose the upper and lower OVLO threshold ( OVL As an example, assume the application requires the following thresholds: V ...

Page 25

Option D: The OVLO function can be disabled by grounding the OVLO pin. The UVLO thresholds are set as described in Option B or Option C. POWER GOOD PIN When the voltage at the FB pin increases above its threshold ...

Page 26

FIGURE 15. Adding Delay to the Power Good Output Pin SYSTEM CONSIDERATIONS A) Continued proper operation of the LM25066A hot swap circuit requires capacitance be present on the supply side of the connector into which the hot swap circuit is ...

Page 27

The board’s edge connector can be designed such that the LM25066A detects via the UVLO/EN pin that the board is be- ing removed, and responds by turning off the load before the supply voltage is disconnected . For example, ...

Page 28

PMBus ™ Command Support The device features an SMBus interface that allows the use of PMBus ™ commands to set warn levels, error masks, and Code Name 01h OPERATION 03h CLEAR_FAULTS 19h CAPABILITY 43h VOUT_UV_WARN_LIMIT 4Fh OT_FAULT_LIMIT 51h OT_WARN_LIMIT 57h ...

Page 29

Code Name D5h MFR_SPECIFIC_05 READ_PIN_PEAK D6h MFR_SPECIFIC_06 CLEAR_PIN_PEAK D7h MFR_SPECIFIC_07 GATE_MASK D8h MFR_SPECIFIC_08 D9h MFR_SPECIFIC_09 DEVICE_SETUP DAh MFR_SPECIFIC_10 BLOCK_READ DBh MFR_SPECIFIC_11 SAMPLES_FOR_AVG DCh MFR_SPECIFIC_12 READ_AVG_VIN DDh MFR_SPECIFIC_13 READ_AVG_VOUT DEh MFR_SPECIFIC_14 READ_AVG_IIN DFh MFR_SPECIFIC_15 READ_AVG_PIN E0h MFR_SPECIFIC_16 BLACK_BOX_READ E1h MFR_SPECIFIC_17 DIAGNOSTIC_WORD_READ ...

Page 30

OPERATION Register The OPERATION command is a standard PMBus ™ com- mand that controls the MOSFET switch. This command may be used to switch the MOSFET ON and OFF under host con- trol also used to re-enable the ...

Page 31

VIN_OV_WARN_LIMIT The VIN OVERVOLTAGE WARN LIMIT is a standard PM- Bus ™ command that allows configuring or reading the thresh- old for the VIN Overvoltage Warning detection. Reading and writing to this register should use the coefficients shown in the ...

Page 32

STATUS_WORD The STATUS WORD is a standard PMBus ™ command that returns the value of a number of flags indicating the state of the LM25066A. Accesses to this command should use the Bit NAME 15 VOUT 14 IOUT/POUT 13 INPUT ...

Page 33

STATUS_TEMPERATURE The STATUS TEMPERATURE is a standard PMBus ™ com- mand that returns the value of the of a number of flags related to the temperature telemetry value. Accesses to this com- TABLE 13. STATUS TEMPERATURE Definitions Bit NAME 7 ...

Page 34

READ_VOUT The READ VOUT is a standard PMBus ™ command that re- turns the 12 bit measured value of the output voltage. Reading this register should use the coefficients shown in the Teleme- try and Warning Conversion Coefficients Table. Accesses ...

Page 35

MFR_SPECIFIC_01: MFR_READ_IIN The MFR READ IIN command will report the 12-bit ADC mea- sured current sense voltage. To read data from the MFR_READ_IIN command, use the PMBus™ Read Word protocol. Reading this register should use the coefficients shown in the ...

Page 36

DIAGNOSTIC_WORD) and the external MOSFET gate control will still be active (VIN_OV_FAULT, VIN_UV_FAULT, IIN/PFET_FAULT, BIT MFR_SPECIFIC_09: DEVICE_SETUP The DEVICE SETUP command may ...

Page 37

AVGN=12 equates to 4096 samples used in computing the average). The LM25066A supports average numbers 16, 32, 64, 128, 256, 512, 1024, 2048, 4096. The SAMPLES_FOR_AVG number applies to average values of IIN, VIN, VOUT, ...

Page 38

MFR_SPECIFIC_17: READ_DIAGNOSTIC_WORD The READ DIAGNOSTIC WORD PMBus command will re- port all of the LM25066A faults and warnings in a single read operation. The standard response to the assertion of the SM- BALERT signal of issuing multiple read requests to ...

Page 39

FIGURE 18. Command/Register and Alert Flow Diagram 39 301460a2 www.national.com ...

Page 40

Reading and Writing Telemetry Data and Warning Thresholds All measured telemetry data and user programmed warning thresholds are communicated in 12 bit two’s compliment bi- nary numbers read/written in 2 byte increments conforming to the Direct format as described in ...

Page 41

TABLE 42. Current and Power Telemetry and Warning Conversion Coefficients (R Commands *READ_IN, READ_AVG_IN MFR_IIN_OC_WARN_LIMIT *READ_IN, READ_AVG_IN MFR_IIN_OC_WARN_LIMIT *READ_PIN, READ_AVG_PIN, READ_PEAK_PIN MFR_PIN_OP_WARN_LIMIT *READ_PIN, READ_AVG_PIN, READ_PEAK_PIN MFR_PIN_OP_WARN_LIMIT Care must be taken to adjust the exponent coefficient, R, such that the value ...

Page 42

Reading Input and Output Voltage Coefficients for VIN and VOUT are fixed and are consistent between read telemetry measurements (e.g., READ_VIN, READ_AVG_VIN) and warning Step 1. Determine m' based on full scale analog input and full scale digital range: 2. ...

Page 43

Determining Telemetry Coefficients Empirically with Linear Fit The coefficients for telemetry measurements and warning thresholds presented in Table 41 are adequate for the ma- jority of applications. Current and power coefficients must be calculated per application as they are dependent ...

Page 44

PMBus™ Address Lines (ADR0, ADR1, ADR2) The three address lines are to be set high (connect to VDD), low (connect to GND), or open to select one of 27 addresses ADR2 ...

Page 45

SMBus Communications Timing Requirements Symbol Parameter F SMBus Operating Frequency SMB T Bus free time between Stop and Start Condition BUF T Hold time after (Repeated) Start Condition. After this HD:STA period, the first clock is generated. T Repeated Start ...

Page 46

SMBALERT Response The SMBALERT effectively has two masks: 1. The Alert Mask Register at D8h, and 2. The ARA Automatic Mask. The ARA Automatic Mask is a mask that is set in response to a successful ARA read. An ARA ...

Page 47

Physical Dimensions inches (millimeters) unless otherwise noted NS Package Number SQA24B 47 www.national.com ...

Page 48

... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...

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