hd64338342hw Renesas Electronics Corporation., hd64338342hw Datasheet - Page 308

no-image

hd64338342hw

Manufacturer Part Number
hd64338342hw
Description
Renesas 8-bit Single-chip Microcomputer H8 Family/h8/300l Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 9 Timers
During interval timer operation (TMC7 = 0), when a value is set in timer load register C (TLC),
the same value is set in TCC.
Note: For details on interrupts, see section 3.3, Interrupts.
2. Auto-reload Timer Operation
Setting bit TMC7 in TMC to 1 causes timer C to function as an 8-bit auto-reload timer. When a
reload value is set in TLC, the same value is loaded into TCC, becoming the value from which
TCC starts its count.
After the count value in TCC reaches H'FF (H'00), the next clock signal input causes timer C to
overflow/underflow. The TLC value is then loaded into TCC, and the count continues from that
value. The overflow/underflow period can be set within a range from 1 to 256 input clocks,
depending on the TLC value.
The clock sources, up/down control, and interrupts in auto-reload mode are the same as in interval
mode.
In auto-reload mode (TMC7 = 1), when a new value is set in TLC, the TLC value is also set in
TCC.
3. Event Counter Operation
Timer C can operate as an event counter, counting rising or falling edges of an external event
signal input at pin TMIC. External event counting is selected by setting bits TMC2 to TMC0 in
timer mode register C to all 1s (111).
When timer C is used to count external event input, bit IRQ
in PMR1 should be set to 1 and bit
1
IEN
in IENR1 cleared to 0 to disable interrupt IRQ
requests.
1
1
4. TCC Up/Down Control by Hardware
With timer C, TCC up/down control can be performed by UD pin input. When bit TMC6 is set to
1 in TMC, TCC functions as an up-counter when UD pin input is high, and as a down-counter
when low.
When using UD pin input, set bit UD to 1 in PMR3.
Rev. 6.00 Aug 04, 2006 page 272 of 680
REJ09B0145-0600

Related parts for hd64338342hw