cbtl03sb212 NXP Semiconductors, cbtl03sb212 Datasheet - Page 8

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cbtl03sb212

Manufacturer Part Number
cbtl03sb212
Description
Cbtl03sb212 Displayport Gen2 Sideband Signal Multiplexer
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 10.
[1]
Table 11.
11. Test information
CBTL03SB212
Product data sheet
Symbol
V
t
Symbol
V
V
I
PD
LI
I
IH
IL
Low-speed input changes state on cable plug/unplug.
Parameter
input voltage
propagation delay
HPD input and output characteristics
SEL, XSD_N input characteristics
Parameter
HIGH-level input voltage
LOW-level input voltage
input leakage current
10.4 HPD input, HPD output
10.5 MUX select input
11.1 Switch test fixture requirements
The test fixture for switch S-parameter measurement shall be designed and built to
specific requirements, as described below, to ensure good measurement quality and
consistency.
The test fixture shall be a FR4-based PCB of the microstrip structure; the dielectric
thickness or stack-up shall be about 4 mils.
The total thickness of the test fixture PCB shall be 1.57 mm (0.062 in).
The measurement signals shall be launched into the switch from the top of the test
fixture, capturing the through-hole stub effect.
Traces between the DUT and measurement ports (SMA or microprobe) should be
uncoupled from each other, as much as possible. Therefore, the traces should be
routed in such a way that traces will diverge from each other exiting from the switch
pin field.
The trace lengths between the DUT and measurement port shall be minimized. The
maximum trace length shall not exceed 1000 mils. The trace lengths between the
DUT and measurement port shall be equal.
All of the traces on the test board and add-in card must be held to a characteristic
impedance of 50 Ω with a tolerance of ±7 %.
SMA connector is recommended for ease of use. The SMA launch structure shall be
designed to minimize the connection discontinuity from SMA to the trace. The
impedance range of the SMA connector seen from a TDR with a 60 ps rise time
should be within 50 Ω ± 7 Ω.
All information provided in this document is subject to legal disclaimers.
Conditions
from left-side port to right-side port
or vice versa
Rev. 1 — 21 February 2011
Conditions
SEL, XSD_N
SEL, XSD_N
measured with input at
V
IH(max)
and V
IL(min)
DisplayPort Gen2 sideband signal multiplexer
[1]
Min
−0.3
-
Min
2.0
0
-
CBTL03SB212
Typ
-
100
Typ
-
-
-
© NXP B.V. 2011. All rights reserved.
Max
3.6
-
Max
3.6
0.8
10
Unit
V
ps
Unit
V
V
μA
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