mk5025q-1002 STMicroelectronics, mk5025q-1002 Datasheet - Page 32
mk5025q-1002
Manufacturer Part Number
mk5025q-1002
Description
High Speed Link Level Controller
Manufacturer
STMicroelectronics
Datasheet
1.MK5025Q-1002.pdf
(64 pages)
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TP
TRANSMIT POLLING TIMER. This scaled timer determines the length of time between
polls of the Transmit Descriptor Ring to determine if there is a frame awaiting transmis-
sion (i.e. OWNA bit has been set plus other appropriate information placed in the current
Transmit Descriptor). Unless TDMD (see CSR0) is set, or a frame is received (in proto-
col mode) on the link, no attempt is made to transmit a frame in the Transmit Descriptor
Ring until TP expires. At TP expiration all frames available in the Transmit Descriptor
Ring will be sent. This field must contain the two’s complement of the period of timer
TP.
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