mk50h27 STMicroelectronics, mk50h27 Datasheet - Page 32
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mk50h27
Manufacturer Part Number
mk50h27
Description
Signalling System 7 Link Controller
Manufacturer
STMicroelectronics
Datasheet
1.MK50H27.pdf
(56 pages)
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MK50H27
4.2.5 Transmit Descriptor Ring Pointer (continued)
4.2.6 Status Buffer Address
32/56
BIT
15
14:12
11:08
07:00/15:00
BIT
15:08
07:00/15:00
IADR + 46
IADR + 44
NAME
0
TLEN
0
TDRA
NAME
TWS
SBA
1
5
Ring expressed as a power of two.
(lowest address) of the Transmit Descriptor Ring.
Descriptor Ring Address must begin on a word boundary.
of MSUs that can be transmitted without acknowledgement. For com-
pliance with Japanese TTC JT-Q703 this value should typically be 40.
For compliance with CCITT/ITU Q.703 this value should be 127. For
compatibility with the original MK50H27, this field may be programmed
with all zeroes, causing the MK50H27 to use a default value of 127 as
did the MK50H27.
buffer into which link status information is placed upon the issuance of
the Status Request primitive by the HOST. The status buffer must be-
gin on a word boundary.
DESCRIPTION
Reserved, must be written as a zero.
TRANSMIT RING LENGTH is the number of entries in the Transmit
Reserved, must be written as a zero.
TRANSMIT DESCRIPTOR RING ADDRESS is the base address
DESCRIPTION
TRANSMIT WINDOW SIZE is used to determine the maximum number
STATUS BUFFER ADDRESS points to the status
1
4
TLEN
1
3
0
1
2
3
4
5
6
7
TWS <15:08>
1
2
1
1
Number of Entries
0
0
SBA<15:00>
0
9
128
16
32
64
1
2
4
8
0
8
0
7
0
6
0
5
SBA<23:16>
0
4
0
3
0
2
The
0
1
0
0
0
Transmit