isd5100 Winbond Electronics Corp America, isd5100 Datasheet - Page 57

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isd5100

Manufacturer Part Number
isd5100
Description
Single-chip 1 To 16 Minutes Duration Voice Record/playback Devices With Digital Storage Capability
Manufacturer
Winbond Electronics Corp America
Datasheet
SCL clock frequency
Hold
condition. After this period, the first
clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START
condition
Data set-up time
Rise time of both SDA and SCL
signals
Fall time of both SDA and SCL
signals
Set-up time for STOP condition
Bus-free time between a STOP and
START condition
Capacitive load for each bus line
Noise margin at the LOW level for
each connected device (including
hysteresis)
Noise margin at the HIGH level for
each connected device (including
hysteresis)
1.
If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA
line; t
before the SCL line is released.
2.
time
A Fast-mode I
requirement t
stretch the LOW period of the SCL signal.
C
allowed.
PARAMETER
r max
b
= total capacitance of one bus line in pF. If mixed with HS mode devices, faster fall-times are
(repeated)
+ t
SU;DAT
SU;DAT
= 1000 + 250 = 1250 ns (according to the Standard-mode I
2
C-interface device can be used in a Standard-mode I
START
> 250 ns must then be met. This will automatically be the case if the device does not
SYMBOL
t
t
t
t
HD-STA
SU-DAT
SU-STO
SU-STA
t
t
f
t
V
V
HIGH
LOW
C
SCL
BUF
t
t
nH
nL
r
f
b
I
2
C INTERFACE TIMING
STANDARD-MODE
0.1 V
0.2 V
MIN.
250
4.0
4.7
4.0
4.7
4.0
4.7
0
-
-
-
- 57 -
DD
DD
MAX.
1000
100
300
400
-
-
-
-
-
-
-
-
-
Publication Release Date: May 16, 2007
20 + 0.1C
20 + 0.1C
0.1 V
0.2 V
ISD5100 SERIES
100
MIN.
0.6
1.3
0.6
0.6
0.6
1.3
0
-
2
FAST-MODE
(1)
C-interface system, but the
DD
DD
2
b
b
C -interface specification)
(2)
(2)
MAX.
400
300
300
400
-
-
-
-
-
-
-
-
-
Revision 1.4
UNIT
kHz
pF
μs
μs
μs
μs
ns
ns
ns
μs
μs
V
V

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