tda6503a NXP Semiconductors, tda6503a Datasheet - Page 4

• Manufacturer Part Number: tda6503a
• Description: 5 V Mixers/oscillators And Synthesizers For Cable Tv And Vcr 2-band Tuners
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Depending on the voltage applied to pin SW (see Table 2)
the device is operating in the I
mode.
In the 3-wire bus mode, pin LOCK/ADC is the ‘lock’ output
of the PLL and is at LOW level when the PLL is locked.
Lock detector bit FL of the status byte is set to logic 1 when
the loop is locked and is read on the SDA line during a
READ operation in I
In the I
for digital AFC control. The ADC code is read during a
READ operation on the I
In the test mode, in both I
mode, pin LOCK/ADC is used as a test output for f
1
3.1
Five serial bytes (including the address byte) are required
to address the device, select the VCO frequency, program
the four ports, set the charge pump current and set the
reference divider ratio. The device has four independent
I
specific voltage to pin CE/AS.
2001 Aug 22
2
2
C-bus addresses which can be selected by applying a
f
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
DIV
.
2
I
C-bus mode only, pin LOCK/ADC is the ADC input
2
C-bus format
2
C-bus mode only.
2
C-bus.
2
C-bus mode and 3-wire bus
2
C-bus mode or 3-wire bus
REF
and
4
3.2
Data is transmitted to the device during a HIGH level on
pin CE/AS (enable line). The device is accessible with
18-bit and 19-bit data formats (see Figs 4 and 5). The first
four bits are used to program the PMOS ports and the
remaining bits control the programmable divider. A 27-bit
data format (see Fig.6) may also be used to set the charge
pump current, the reference divider ratio and the test
modes.
It is not allowed to address the device with words whose
length is different from 18, 19 or 27 bits.
Table 1 Data word length for 3-wire bus format
Note
1. The selection of the reference divider is given by an
DATA WORD
automatic identification of the data word length. When
the 27-bit format is used, the reference divider is
controlled by bits RSA and RSB (see Table 8). More
details are given in Section 8.3.
18-bit
19-bit
27-bit
3-wire bus format
TDA6502; TDA6502A;
programmable
REFERENCE
TDA6503; TDA6503A
DIVIDER
128
64
(1)
Product specification
programmable
FREQUENCY
62.50 kHz
31.25 kHz
STEP