74abt651pw NXP Semiconductors, 74abt651pw Datasheet - Page 4

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74abt651pw

Manufacturer Part Number
74abt651pw
Description
Octal Transceiver/register, Inverting 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
FUNCTION TABLE
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
*
**
LOGIC DIAGRAM
2002 Dec 17
OEAB
Octal transceiver/register, inverting (3-State)
= LOW-to-HIGH clock transition
H
H
H
H
L
L
X
L
L
L
L
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
If both Select controls (SAB and SBA) are LOW, then clocks can occur simultaneously. If either Select control is HIGH, the clocks must
be staggered in order to load both registers.
OEBA
H
H
H
H
H
H
X
L
L
L
L
OEBA
OEAB
CPBA
CPAB
SBA
SAB
A0
A1
A2
A3
A4
A5
A6
A7
CPAB
H or L
H or L
H or L
H or L
INPUTS
X
X
X
10
11
4
5
6
7
8
9
21
23
22
3
1
2
CPBA
H or L
H or L
H or L
H or L
X
X
X
SAB
1of 8 Channels
**
H
H
X
X
X
X
X
X
X
L
1D
SBA
C1
X
X
X
X
X
**
H
X
X
H
L
Q
Unspecified
output*
Output
Output
DETAIL A X 7
Input
Input
Input
An
4
DATA I/O
Unspecified
output*
Output
Output
Input
Input
Input
Bn
Q
C1
1D
Real time B data to A bus
Real time A data to B bus
Store A in both registers
Store B in both registers
Stored B data to A bus
Stored A data to B bus
Stored B data to A bus
Store A data to B bus
OPERATING MODE
OPERATING MODE
Store A and B data
Store A, Hold B
Hold A, Store B
Isolation
20
19
18
17
16
15
14
13
SA00098
B0
B1
B2
B3
B4
B5
B6
B7
74ABT651
Product data

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