74aup2g132 NXP Semiconductors, 74aup2g132 Datasheet
74aup2g132
Manufacturer Part Number
74aup2g132
Description
74aup2g132 Low-power Dual 2-input Nand Schmitt Trigger
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP2G132.pdf
(18 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74aup2g132GT,115
Manufacturer:
NXP Semiconductors
Quantity:
4 000
1. General description
2. Features
3. Applications
The 74AUP2G132 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
The 74AUP2G132 provides the dual 2-input NAND Schmitt trigger function which accept
standard input signals. They are capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
hysteresis voltage V
I
I
I
I
I
I
I
I
I
I
I
I
I
CC
74AUP2G132
Low-power dual 2-input NAND Schmitt trigger
Rev. 01 — 18 October 2006
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
OFF
N
N
N
range from 0.8 V to 3.6 V.
OFF
HBM JESD22-A114-D Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
H
.
T+
and the negative voltage V
CC
= 0.9 A (maximum)
CC
T
is defined as the input
Product data sheet
OFF
.
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