74aup2g240 NXP Semiconductors, 74aup2g240 Datasheet
74aup2g240
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74aup2g240 Summary of contents
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... The I OFF the device when it is powered down. The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A high level at pin nOE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE is high ...
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... Package Temperature range Name 74AUP2G240DC +125 C 74AUP2G240GT +125 C 74AUP2G240GM +125 C 4. Marking Table 2. Marking Type number 74AUP2G240DC 74AUP2G240GT 74AUP2G240GM 5. Functional diagram 1 1OE 2OE 5 2A Fig 1. Logic symbol 74AUP2G240_1 Product data sheet Low-power dual inverting buffer/line driver; 3-state ...
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... LOW) 8 supply voltage Rev. 01 — 6 October 2006 74AUP2G240 2OE 74AUP2G240 terminal 1 index area 2OE Transparent top view © NXP B.V. 2006. All rights reserved. 7 1OE 001aaf409 ...
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... CC O Active mode and Power-down mode +125 C amb derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode 0 3 Rev. 01 — 6 October 2006 74AUP2G240 Output Min Max 0.5 +4 [1] 0.5 +4 [1] 0.5 +4 ...
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... GND 0 3 Rev. 01 — 6 October 2006 74AUP2G240 Min Typ Max ...
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... 4 GND Rev. 01 — 6 October 2006 74AUP2G240 Min Typ [ [ 0 1 1 ...
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... 4 GND Rev. 01 — 6 October 2006 74AUP2G240 Min Typ - - - - [ [ 0. 0. 1 ...
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... [4] Figure Rev. 01 — 6 October 2006 74AUP2G240 Min Typ - - - - [ [ +125 C [1] Min Typ Max ...
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... Figure [3] Figure Rev. 01 — 6 October 2006 74AUP2G240 +125 C [1] Min Typ Max Min Max ( 25 3.5 6.6 14.5 3.2 16.3 2.2 4.6 8.4 2.0 2.0 3.8 6.4 1.8 1 ...
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... Figure [4] Figure Rev. 01 — 6 October 2006 74AUP2G240 +125 C [1] Min Typ Max Min Max ( 62 4.3 6.6 10.4 3.6 11.6 3.0 5.0 7.4 2.5 3.0 5.3 7.8 2.1 2 ...
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... where input V M GND t PHL output Table 9. Input 0 Rev. 01 — 6 October 2006 74AUP2G240 +125 C [1] Typ Max Min Max ( 3.7 - ...
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... PHZ GND outputs enabled Table 10. Output Rev. 01 — 6 October 2006 74AUP2G240 t PZL PZH V M outputs outputs enabled disabled mna961 © NXP B.V. 2006. All rights reserved. ...
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... Low-power dual inverting buffer/line driver; 3-state PULSE DUT GENERATOR for measuring propagation delays, setup and hold times and pulse width R L Rev. 01 — 6 October 2006 74AUP2G240 V EXT 001aac521 of the pulse generator EXT ...
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... Low-power dual inverting buffer/line driver; 3-state 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 01 — 6 October 2006 74AUP2G240 detail 3.2 0.40 0.21 0.4 0.2 0.13 0.15 0.19 3.0 EUROPEAN PROJECTION SOT765 ...
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... Low-power dual inverting buffer/line driver; 3-state scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 01 — 6 October 2006 74AUP2G240 4 ( EUROPEAN PROJECTION © NXP B.V. 2006. All rights reserved. SOT833-1 ISSUE DATE 04-07-22 04-11- ...
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... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 01 — 6 October 2006 74AUP2G240 detail 0.05 0.05 0.05 EUROPEAN PROJECTION SOT902 ISSUE DATE 05-11-16 05-11-25 © NXP B.V. 2006. All rights reserved ...
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... Revision history Table 13. Revision history Document ID Release date 74AUP2G240_1 20061006 74AUP2G240_1 Product data sheet Low-power dual inverting buffer/line driver; 3-state Data sheet status Change notice Product data sheet - Rev. 01 — 6 October 2006 74AUP2G240 Supersedes - © NXP B.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 6 October 2006 74AUP2G240 © NXP B.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 6 October 2006 Document identifier: 74AUP2G240_1 ...