74aup2gu04 NXP Semiconductors, 74aup2gu04 Datasheet

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74aup2gu04

Manufacturer Part Number
74aup2gu04
Description
74aup2gu04 Low-power Dual Unbuffered Inverter
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
74aup2gu04GW
Manufacturer:
KEYSTONE
Quantity:
220
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AUP2GU04GW
74AUP2GU04GM
74AUP2GU04GF
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74AUP2GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible families.
This device ensures a very low static and dynamic power consumption across the entire
V
The 74AUP2GU04 provides two unbuffered inverting gates.
I
I
I
I
I
I
I
I
CC
74AUP2GU04
Low-power dual unbuffered inverter
Rev. 01 — 15 December 2006
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
N
N
N
range from 0.8 V to 3.6 V.
HBM JESD22-A114D Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
SC-88
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
plastic extremely thin small outline package; no leads;
6 terminals; body 1
plastic extremely thin small outline package; no leads;
6 terminals; body 1
CC
= 0.9 A (maximum)
1.45
1
0.5 mm
0.5 mm
Product data sheet
Version
SOT363
SOT886
SOT891

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74aup2gu04 Summary of contents

Page 1

... Low-power dual unbuffered inverter Rev. 01 — 15 December 2006 1. General description The 74AUP2GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible families. This device ensures a very low static and dynamic power consumption across the entire V range from 0 3.6 V. ...

Page 2

... Fig 4. Pin configuration SOT363 (SC-88) 74AUP2GU04_1 Product data sheet Marking code mnb107 Fig 2. IEC logic symbol 74AUP2GU04 GND 001aad700 Transparent top view Fig 5. Pin configuration SOT886 (XSON6) Rev. 01 — 15 December 2006 ...

Page 3

... Conditions V < > < +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Max Unit 0.5 +4 [1] 0.5 +4 [ ...

Page 4

... GND GND GND GND Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Max 0.8 3 +125 0 200 Min Typ Max 0. 0. ...

Page 5

... 1 1 1 2 3 2 4 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Typ Max 2.67 ...

Page 6

... [2] Figure Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Min Typ - - - - - - - - - - - - - - - - - - - - 8 ...

Page 7

... [3][4] = GND where Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter +125 C [1] Min Typ Max Min Max ( 13 1.6 3.8 7.9 1.4 8.8 1.3 2.8 4.9 1.1 5.7 1.0 2.3 4.0 ...

Page 8

... 0 PULSE DUT GENERATOR for measuring propagation delays, set-up and hold times and pulse width L Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter PLH V M mna344 3 EXT ...

Page 9

... Product data sheet R bias = 560 0.47 F input output kHz (mA/ Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 100 GND mna050 001aad074 (V) CC © NXP B.V. 2006. All rights reserved ...

Page 10

... NXP Semiconductors 14. Application information Some applications for the 74AUP2GU04 are: • Linear amplifier (see • Crystal oscillator (see Remark: All values given are typical values unless otherwise specified. Fig 11. Linear amplifier application Fig 12. Crystal oscillator application 74AUP2GU04_1 Product data sheet ...

Page 11

... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE 04-11-08 06-03-16 © ...

Page 12

... Product data sheet scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2006. All rights reserved ...

Page 13

... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter 2 mm EUROPEAN ISSUE DATE PROJECTION 05-03-11 05-04-06 © NXP B.V. 2006. All rights reserved. SOT891 ...

Page 14

... Transistor-Transistor Logic 17. Revision history Table 12. Revision history Document ID Release date 74AUP2GU04_1 20061215 74AUP2GU04_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter Supersedes - © NXP B.V. 2006. All rights reserved ...

Page 15

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 15 December 2006 74AUP2GU04 Low-power dual unbuffered inverter © NXP B.V. 2006. All rights reserved ...

Page 16

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 15 December 2006 Document identifier: 74AUP2GU04_1 ...

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